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GaN HEMT RF Devices Deliver Wide Bandwidth Power Amplifier Performance

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Wolfspeed & Powerful Microwave Develop Reference Design Circuit for Wide Bandwidth, Low Frequency (50 – 1,000 MHz) Power Amplifier

by Ryan Baker, RF Product Marketing Manager, and Dr. Dominic FitzPatrick, Principal Consultant – Wolfspeed, A Cree Company

To demonstrate the performance advantages possible in wide bandwidth, low frequency power amplifiers through the use of gallium nitride (GaN) high electron mobility transistors (HEMTs), Wolfspeed, a Cree Company, and Powerful Microwave Ltd. developed an application circuit that uses two GaN HEMT power devices to obtain a power output of 100W over a frequency range of 50 MHz to 1,000 MHz.

Designed for high performance, wideband communications applications, VHF and UHF amplifiers built using GaN technology are ideal for public safety, tactical and secure military communications, transmitters challenged to reduce size and weight, and other communications applications seeking to improve bandwidth, efficiency, and frequency of operation. These features enable significant savings on operating expenses and, in the case of handheld radios, the improved efficiency can even lead to improved battery life.

The following application note describes the typical performance that can be achieved when evaluating the demonstration circuit. Details of the circuit are included for further understanding of the topology, along with all necessary information to aid in reproduction of the amplifier. The reference design includes the 15W driver circuit and the 100W power amplifier output stage, both of which are designed to operate at 50 – 1,000 MHz.

Based on Wolfspeed’s highly reliable 0.4um G50V3 foundry process, both the 15W and 100W GaN HEMTs are unmatched transistors, meaning they can be matched externally for other amplifier designs through S-Band, up to 3.0 GHz. Both devices were also subject to the testing that Wolfspeed recently completed to demonstrate compliance with NASA reliability standards for satellite and space systems. Further, Wolfspeed’s proven GaN-on-SiC fabrication processes demonstrate industry-leading reliability and performance, having delivered more than 100 billion total hours of field operation with a best-in-class FIT rate of less than 5 per billion device hours for discrete GaN RF transistors and multi-stage GaN MMICs.

Key features of the resulting combined amplifier demonstration circuit include:

•  Wide bandwidth covering 50 MHz – 1,000 MHz

•  >18 dB small signal gain from the output stage

•  >30 dB small signal gain from driver and output stages

•  >50 % drain efficiency

•  100W saturated output power

•  Intended for use in military and tactical communications applications

Overall Design 

These application circuits were designed to provide a combined output power of 100W with 30 dB gain from 50 – 1,000 MHz. First, a test circuit was designed to demonstrate the wideband performance of the 15W GaN power device (Wolfspeed CGHV27015S), which acts as a driver stage for the 100W device (Wolfspeed CGHV40100F). This driver amplifier demonstration circuit, designated as the 03-000325, is shown in Figure 1.

The driver circuit is constructed using RO4350B circuit board material mounted on a 6mm aluminum plate. Also shown in Figure 1 is the bias sequencing circuit, which is designed to provide correct sequencing for the gate and drain voltages, in addition to over-temperature and over-current shutdown protection. It is implemented on an FR4 PCB mounted perpendicular to the main RF circuit.

Driver Circuit  

The output stage power amplifier circuit board, designated 03-000326, is shown in Figure 2, along with its bias circuit. The driver stage was designed to achieve 100 – 1,000 MHz bandwidth at an output power level of 10W, which is suitable for driving the 100W amplifier stage. In order to achieve flat gain over this range, shunt feedback was included in the design. To maximize bandwidth, limited input matching was incorporated in the test fixture. Therefore, it is recommended that an input attenuator be used to minimize interactions with the input signal source (a 5 dB 2W SMA attenuator was used for testing). With the higher impedances at the lower power level, matching would require a transformer, which would introduce a frequency limitation. Figure 3 depicts the schematic diagram of the driver circuit. The final design exceeds the performance objectives, delivering 15W over 50 – 1,000 MHz.

The bias to the device was adjusted from the pinched-off gate to the voltage required for 60 mA Idq with no RF present: -2.71 V. The small signal performance of the driver circuit with this bias at 0 dBm input level demonstrated a gain >18 dB from 1 – 1,200 MHz (Figure 4).

The operation of the bias sequencing and overcurrent protection board (bias board) is described in more detail below. Users may choose to operate the unit directly without the bias board; however, the gate bias voltage must then be applied before the drain, and removed after the drain voltage has fallen to 0V, which prevents the power device from drawing excessive drain current. For additional protection, the drain supply current should be limited so that it cannot exceed 0.65 A at a drain voltage of 30 V. Note that the 15W GaN HEMT in the driver circuit can be operated at up to 50V for saturated power operation, but thermal limitations must be observed.

Bias and Protection Board 

As pictured in Figure 1, the board fulfills a number of functions:

A. Gate/Drain voltage sequencing

B. Overcurrent protection

C. Gate voltage adjustment

D. Gate voltage temperature compensation

E. Thermal shutdown/amplifier mute capability

F. Auxiliary +24V/150 mA supply (fan)

G. LED operation indicators for gate, drain, and over-temperature

A. Gate/Drain Voltage Sequencing 

As noted above, it is important to establish the gate voltage before the drain voltage is applied to the transistor in order to prevent excess drain current. On the bias and protection board, a DC-DC converter produces a negative voltage from the +V supply, which is then passed through a linear voltage regulator to provide a stable negative voltage supply for the gate. The linear regulator helps minimize switching spurs from the DC-DC converter, which is important because noise and other perturbations on the gate voltage will modulate the RF carrier and appear at the output of the amplifier. When the output of the linear regulator exceeds its defined limit, the drain control circuit is enabled. At switch-off, the reverse sequence is implemented; the drain voltage falls to 0V before the gate shuts down.

B. Over-Current Protection 

A current sense circuit is included in the drain voltage control block. When the current exceeds 0.63 A (±5%), the overcurrent limit, it will activate and switch off the drain supply. As a safety precaution, the supply voltage must be removed for about 1 second to reset the circuit. The current limit is determined by thermal dissipation of the transistor at 30V drain voltage. Continuous operation above this limit will cause overheating. Users may choose to operate at a higher peak current — for example, using a pulsed or modulated RF where the average current will be below 0.63 A — and, in that case, R8 on the bias board, which is a 2512 size precision 1W current sense resistor, can be changed to a lower resistance. The current trip is initiated when the voltage drop across R8 exceeds 50 mV. So, the equation for R8 is: R8(mΩ) = 50 mV/I(A).

Warning: Changing R8 to a lower resistance risks damaging Q1, so additional average current limiting should be incorporated in the supply. Also, if operated from a 50V supply, the current limit needs to be decreased.

C. Gate Voltage Adjustment 

The gate voltage is nominally set to provide a quiescent drain current (Idq) of 50 mA, delivering the flattest overall gain response. This can be increased with the variable resistor on the bias board: R18. Rotating clockwise makes the gate voltage less negative and increases the drain current. The nominal maximum gate voltage is -1.8V, which equates to a drain current of ~0.3 A.

D. Gate Voltage Temperature Compensation 

The temperature compensation included on the bias circuit, located on the bias board, is intended to account for long-term temperature changes. Besides mechanical security, this is the other purpose of the fixing screws for the bias board. Wolfspeed GaN devices typically exhibit a temperature response of 0.4 mV/°C. Experimentally, the temperature compensation has been optimized with R25 on the bias board of 5.1kΩ, but this can be altered by users if a different compensation slope is necessary. Increasing R25 reduces the temperature variation of the gate voltage. Note that if R25 is changed, R18 may also require a slight adjustment for the required Idq value.

E. Thermal Shutdown/Mute Capability 

Space for a normally open thermal switch (Airpax 67F070) has been included on the assembly, but the switch is not supplied. This switch closes when the temperature exceeds 70°C. On the bias board, there are two through-holes within the area designated SW1 on the reverse side. If these are shorted together, the bias board shuts down the drain supply; thus, if the thermal switch SW1 pins are connected to these points (orientation does not matter), the driver amplifier will shut down if the switch temperature exceeds 70°C. When this occurs, the red “OTemp” LED will illuminate on the bias board.

These connections also may be used to mute the amplifier without having to switch off the supply. This may be done with a mechanical switch, or by electronically pulling the pin to ground. It is strongly recommended that the user install a thermal switch or take other precautions to ensure that the amplifier is not operated at a temperature above 70°C.

F. Auxiliary (Fan) +24V supply 

An additional 150 mA, +24V supply for a DC cooling fan has been included on the bias board. The connection is accessible from the pad marked V1 on the driver board, on the left hand side of J3. Note that a ground return is also required. Loads requiring more than 150 mA should not be used, as this will cause excessive heating of U4 on the bias board.

G. LED Operation Indicators 

The orange “Gate On” LED is illuminated when the negative supply rail exceeds ~ -2.5 V.

The green “Drain On” LED is illuminated when the drain is on, and the supply rail exceeds +26 V. (Note that the drain LED may illuminate momentarily during the input voltage ramp, but should be extinguished by the time the supply voltage reaches +5 V.)

The red “OTemp” LED is illuminated when either the thermal switch closes or the amplifier mute is in operation.

There is no specific indication when the overcurrent trip activates. However, the “Drain On” will extinguish. To reset, the main supply line must be cycled off/on with a 1 second delay.

Output Stage 

The output power stage circuit, designated 03-000326, was developed to demonstrate the wideband performance of the 100W / 50V GaN HEMT device. Figure 6 shows the schematic with circuit elements defined for computer simulation. The target was to achieve 100 – 1,000 MHz bandwidth at an output power level of 100W. The bias sequencing circuit is implemented on an FR4 PCB mounted perpendicular to the main RF circuit. As described above for the driver circuit, the bias circuit provides the correct sequencing for the gate and drain voltages, as well as over-temperature and overcurrent shutdown protection.

The unit delivers 100W of CW power over the bandwidth by the appropriate selection of C12. As supplied, the unit is tuned for maximum bandwidth, with performance measurements shown in Figure 7. Increasing C12 to 8.6 pF will increase the power at 500 MHz to ≥100W, but at the expense of power output above 900 MHz.

In Figure 8, the blue trace shows the measured small signal (10 dBm drive level) gain, and the purple trace the original simulated response. Using the measurements of the input and output matching circuits in the simulation produces the red trace, which has a similar shape, but has ~1 dB higher loss across the band. The simulation was created with a gate bias voltage of -2.56V to get an Idq of 350 mA; however the simulation used -2.6V for this current. If the gate is set to -2.6V, the current increases to 600 mA and the response is shown in the green trace, resulting in a close match between measured and simulated.

Figures 9 and 10 depict plots of additional performance parameters, including current and drain efficiency over the bandwidth covered by the output power stage circuit, plus the saturated power output. Figure 11 shows the combined gain of the two stages with an input power of +15 dBm. The net gain plot includes the loss of the input attenuator.

The power output stage is supplied with a bias sequencing and overcurrent protection board (bias board). Although the operation of the bias board is the same as previously described for the driver circuit, the operating parameters are different, as noted below. The user may choose to operate the unit without the bias board, but must take care that the alternate approach applies the gate bias voltage before the drain, and removes it after the drain voltage has fallen to 0 V. Further, the drain supply current should be limited such that it cannot exceed 5 A, which is the limit imposed by the drain inductor, L4. In the 100W amplifier board, the bias board is installed along the top of this board, and plugged into connector J3.

Driver Power Amplifier, Operation with the Supplied Bias Board

The supplied bias board connects to J3. If thermal switch SW1 is to be used to connect leads to bias board pins as described earlier, the amplifiers 03-000325 and 03-000326, must be mounted onto an adequate heatsink. At 10W RF output and 50% drain efficiency, the 03-000325 will dissipate 10W of heat. Note that, in this case, the heatsink should be sufficient to keep the base plate to <50°C under normal operation. Four 4mm diameter holes are included in the fixture for mounting on the heatsink.

Ensure that the output of the 03-00325 is connected to a suitable 50Ω load via an appropriately rated cable. If being used to drive the 03-000326, J2 may be connected directly to the input SMA connector of the 03-000326. If mounted on the same heatsink, the connectors should be at the same height.

The power supply should be rated at >0.6 A minimum current rating. Gradually increase the supply voltage to 30V, and observe the current drawn. It should be ~50 mA with no RF. Rotating R18 counter-clockwise will make the gate voltage more negative and reduce the quiescent current Idq. Switch off the supply and connect the RF input (J1) to a low level input signal of ~0 dBm (5 – 1,200 MHz) and observe the gain shape. Note that the unit may require a suitably power rated attenuator if the low input return loss causes issues with the signal source. In testing, a 5 dB 2W attenuator was used. To achieve higher power levels mid-band (at the expense of apex performance), simply shorten the open circuit stub on the input (opposite R1) by cutting it with a scalpel.

Using Directly Connected Power Supplies

Note that the correct sequencing of the applied voltages is essential to avoid damaging the transistor. Care must be taken during switch-on and -off to ensure that the gate voltage is established before applying the drain voltage, and is maintained until the drain voltage is removed. The current capability of the drain and ground wires must be no lower than 0.8 A each.

Summary

This application note details an approach to power amplifier design and operation that seeks to leverage Wolfspeed’s proven reliable GaN-on-SiC RF technology. The challenge to deliver 100W of power from 50 – 1,000 MHz was successfully achieved using GaN HEMTs from Wolfspeed. The two-stage design consistently provides ~30 dB of gain instantaneously across the entire operating frequency, and designers have the additional advantage of being able to use extremely accurate large signal models, which Wolfspeed designs in the Keysight ADS and National Instruments MWO platforms.

To learn more about this design and receive a video discussing the design, contact Wolfspeed at go.wolfspeed.com/MPD-AppNote19.

Figure 1: Driver amplifier with Wolfspeed CGHV27015S and bias control board
Figure 1: Driver amplifier with Wolfspeed CGHV27015S and bias control board
Figure 2: Output amplifier with Wolfspeed CGHV40100 and bias control board
Figure 2: Output amplifier with Wolfspeed CGHV40100 and bias control board
Figure 3: Schematic diagram of the 03-000325 driver
Figure 3: Schematic diagram of the 03-000325 driver
Figure 4: Gain and other typical performance parameters for the driver circuit
Figure 4: Gain and other typical performance parameters for the driver circuit
Figure 5: Bias and protection board block diagram
Figure 5: Bias and protection board block diagram
Figure 6: Schematic diagram of the 03-000326 output stage
Figure 6: Schematic diagram of the 03-000326 output stage
Figure 7: Typical performance of the 03-000326 output stage tuned for maximum bandwidth
Figure 7: Typical performance of the 03-000326 output stage tuned for maximum bandwidth
Figure 8: Small signal gain simulation and measurement results
Figure 8: Small signal gain simulation and measurement results
Figure 9: Pin, Pout, current, and drain efficiency of the 100W application circuit
Figure 9: Pin, Pout, current, and drain efficiency of the 100W application circuit
Figure 10: Saturated Pout of the 100W application circuit
Figure 10: Saturated Pout of the 100W application circuit
Figure 11: Gain of both stages combined with +15 dBm input, including the input attenuator
Figure 11: Gain of both stages combined with +15 dBm input, including the input attenuator

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