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Design of a 10 GHz Low-Noise Amplifier

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by National Instruments

Low-noise amplifiers (LNAs) play a critical role in the radio receiver front end, amplifying very low-power signals received by the antenna that are often just above the noise floor without significantly degrading the signal-to-noise ratio. In most receivers, the overall noise figure (NF) is dominated by the first few stages of the receiver’s front end, determined by Friis’s formulas, as shown in Equation 1, which calculates the noise in a multi-stage network.

Equation 1: Where F1 and G1 are the NF and available power gain, respectively, of the i-th stage and n is the number of stages

LNA designers must minimize noise by considering trade-offs that include impedance matching, choosing the amplifier technology (such as low-noise transistors), and selecting low-noise biasing conditions. Commercially available low-noise field-effect transistors (FETs) for this band, when provided with the optimal bias and source/load impedances, exhibit NF as low as 0.3 dB. A number of LNAs used in the amateur (HAM) radio market offer an NF in the range of 0.7 dB. The 0.4 dB difference arises from insertion losses incurred between the antenna and the LNA, related to the waveguide transition and polarization circuits, as well as a non-optimum input impedance-matching network.

Design enhancements to each of these blocks will result in improvements to the overall HAM radio performance. This application note describes how NI AWR Design Environment, specifically Microwave Office circuit design software, was used to design a 10 GHz LNA (Figure 1) with improved performance in the X-band frequency range.

Figure 1: 10 GHz LNA designed using NI AWR software

This effort includes simulations to investigate FET device capabilities and design flexibility to reduce losses and optimize NF performance.

Specific design details discussed in this application note are:

Choice of the FET device

Choice of the substrate and finishing

Waveguide transition geometry

Pass-band filter and output transition

Enclosure design to damp down oscillation problems

Choosing the FET 

The FET selected for this design effort was the Renesas (previously NEC) NE3515S02 [1]. This device is easy to obtain and offers the required performance, including a minimum NF at 10.4 GHz that is close to 0.3 dB with an associated gain of 12 dB. The device offers good return loss (RL) when matched for minimum NF (Gopt). The measured device S-parameters and noise figure data are available for download as bias-dependent s2p files from the distributor’s web site [2]. The NF and RL circles were calculated and plotted in Microwave Office software based on this imported S-parameter/NF data for the device operating at a bias of Vds = 2 V, Ids = 10 mA (Figure 2).

Figure 2: NF and associated input RL calculated in Microwave Office

Figure 3: Optimized WG adapter geometry

As shown in Figure 2, the input impedance for the NE3515S02 was designed for X-band low-noise applications. The crossover area between RL (blue) and NF (red) circles shows an expected NF ~0.4 dB and RL ~10 dB. Apart from designing a matching circuit that would transform the system’s 50 ohm characteristic impedance to the target source impedance of the LNA, the design also took into consideration factors that would minimize the insertion loss of the input matching circuit.

Figure 4: Analyst simulation results of the input WG to the microstrip

Printed circuit board (PCB) signal losses can come from a number of different sources, including the dielectric material and the copper conductors. When choosing circuit materials, the critical PCB parameters that govern RF performance include dielectric constant (Dk), dissipation, loss, and dielectric thickness. Changes in Dk, whether as a function of frequency, temperature, or for other reasons, can adversely affect the performance of broadband high-frequency analog circuits. Dispersion, which refers to the change in Dk as a function of frequency, can be caused by a number of different circuit material traits, including the polarity of the dielectric material, the loss of the material, and even how the surface roughness of the copper conductor affects the PCB material loss at higher frequencies.

There is a relationship between conductor loss, dielectric loss, and radiation loss for several reasons. For a fixed dielectric thickness, wider transmission lines have low characteristic impedance and tend to have higher dielectric loss than thinner lines. Conversely, thinner transmission lines have higher characteristic impedance and experience higher conductor losses. Radiation losses depend on the circuit configuration, design, material thickness, dielectric constant, and frequency. Impedance mismatches due to a change in line widths are also a significant source of radiation loss.

Taking into account the information in the datasheet of the device and the different transmission line impedances to be used on the PCB, the designer selected copper-clad RO4003C material from Rogers Corporation with a thickness of about 0.305 mm. This economical, low-loss ceramic laminate is widely recommended by many manufacturers and fit the requirements of this design.

Low-Loss/Wideband Waveguide Transition

The input stage of the LNA played a critical part in ensuring that the resulting NF was responsible for transforming the input impedance of the system (usually 50 ohms) to the Gopt of the FET, as discussed in the previous section, while being careful to minimize the insertion loss. In this LNA design, the use of a waveguide-to-microstrip adapter was implemented to minimize the size, as well as the loss.

A common approach (DB6NT [3], HB9BBD [4]) is to design the LNA and waveguide (WG) adapter individually to the standard characteristic impedance of 50 ohms. However, this option has several disadvantages, including narrow-band matching response, sensitivity to manufacturing tolerances (mechanical and PCB), and matching network losses. As an alternative approach, the output impedance of the WG transition was designed to equal the Gopt impedance required by the FET at the microstrip input reference plane for low NF. Since this impedance was complex (real + imaginary), special care had to be taken during simulation to avoid reference plane rotation, which would yield a non-optimal source impedance and higher NF.

Figure 3 shows the optimized WG adapter geometry. The use of an impedance transformer with stepping height allowed for reduction of the waveguide impedance viewed from the microstrip probe. This multi-step impedance transformer, combined with an optimum shape of the probe and back short position, provided a broader bandwidth.

The simulation of the input was performed using Analyst™ 3D FEM EM simulator. The first port was placed at the waveguide input and the second port was placed at the reference plane of the device. After some adjustments (tuning/optimization) to the impedance transformer, probe, and back short geometries, the result (Figure 4) yielded promising performance and confirmed the potential for this type of design by matching to Gopt from 9 GHz to 12 GHz with a variation of only 0.1 dB from the NF min.

This LNA was based on a two-stage design. The transistor biasing for both stages also impacted the NF. The power supply function should accept a supply voltage ranging between 8 and 14 V and be able to adjust the current of each transistor. In addition, the bias circuitry must not be responsible for any RF instability nor consume too much area on the PCB. For this LNA, the chosen solution was built around a dedicated integrated FET bias controller (ZNBG4000) with a linear regulator to increase the input voltage range (Figure 5). By adjusting the value of each resistor (R1 and R2), it was possible to control the current of each device and to optimize the NF.

Figure 5: FET bias controller completed with a linear regulator to increase input voltage range
Figure 6: Design of the planar structures
Figure 7: Band pass filter with choice of bandwidth defined by the different parameters impacted by the material and process
Figure 8: Output transition design optimized using Analyst

Planar Structure Analysis

After the design of the input transition, the next design phase focused on all the planar structures (Figure 6). This particular LNA design was based on two amplification stages (total gain > 20 dB) and a band-pass filter at the output to reduce the out-of-band gain.

The initial simulation and optimization was performed with Microwave Office software, first using closed-form distributed transmission line models, then making final adjustments and design verification with AXIEM 3D planar EM simulator. This more rigorous EM simulation accounted for the coupling occurring between printed elements and mechanical parts (covers, walls, and more).

The band-pass filter design (Figure 7), including specification of the required output filter bandwidth, was defined by the overall desired LNA bandwidth, including incorporation of the two-stage amplifier response with the simulated filter response based on pertinent parameters such as filter geometry, material, and likely process variations (permittivity, etching).

Output Transition

The final RF section to be designed was the output transition, which called for an output coaxial connector to be placed perpendicular to the PCB. This configuration created a discontinuity from the transmission line output of the band-pass filter to the coaxial structure (drill diameter, copper pad, ground opening). Without any matching network, the EM simulation showed an insufficient output return loss of around 6 dB. A simple stepped impedance transformer (Figure 8), optimized using Analyst, provided an improvement of the return loss to an acceptable value of <20 dB.

Enclosure Design

It is important to consider that at X-band frequencies, the effect of the enclosure cover could impact the overall performance due to unforeseen resonances and/or coupling. The resonant frequency is the frequency where integer half-wavelengths correspond to the dimension of the shielding enclosure. A wave is set up inside the enclosure whose nodes (zero amplitude) lie on the conductive walls of the enclosure. These structures behave as cavity resonators. For example, a 2-inch by 0.5-inch square metallic enclosure resonates at a first order mode of around 12 GHz [5].

Shielding is most cost effective when used in conjunction with other suppression techniques such as grounding, filtering, and proper circuitboard design to minimize the loop area. Unfortunately, designers often leave shielding as a last option since the shields can be installed once the design is completed. However, by incorporating shielding considerations from the beginning of the design process, designers can deliver a more cost-effective and generally more efficient system.

Absorber material is often placed inside the enclosure to suppress radiating fields that could result in spurious oscillations. Unfortunately, due to factors such as temperature and humidity, absorber reliability has been shown to fail in hostile environments over time. For this design, it was decided to suppress all the oscillation problems by designing a specific cover to shield critical components in the LNA chain, which prevented any emergence of propagation-guided modes determined by the enclosure geometry (partitioning length, cover height, and cavity width). Figure 9 shows the enclosure details of the cover.

Figure 9: Enclosure detail of cover designed to suppress all oscillation problems
Figure 10: Simulation results of final simulation done in Microwave Office
Figure 11: Measurement results showing that measurements were very close to simulation
Annexes: Electrical Specifications @ +20 °C

The waveguide input/impedance transformer into the first stage LNA and the output coaxial connector were designed into the back mounting plate opposite the enclosure cover making contact with the PCB ground plane. The PCB was placed between these two metal covers. With this type of design, the positioning of all the parts was simple, with the PCB held in place by the two covers that were bolted together. The machining of the parts was performed on a computer numeric control (CNC) machine to ensure mechanical precision and good reproducibility over the batch.

After testing different finishings, the decision was made to select SERTEC 650. This finishing is compatible with the European Union Registration, Evaluation, Authorization, and Restriction of Chemicals (REACH) requirement for human health and environmental risks, and the effect on the performance is not measurable. The main advantage is protection against oxidation, to insure the device will function for a long period of time.

Simulation Results

All the different simulation blocks performed with Analyst and AXIEM EM simulators were imported as S-parameters into Microwave Office software to obtain the complete response of the amplifier. With this methodology, it was very fast and easy to optimize each subcircuit independently to the desired response. Alternatively, these components could have been co-simulated and optimized directly with the entire LNA network through hierarchical EM subcircuits supported in NI AWR Design Environment. The final result of the simulation (Figure 10) was encouraging and the broadband specification, over the bandwidth of the filter, was maintained. It should be noted that the loss of the input waveguide and the roughness effect (almost certainly insignificant) of the printed lines was not taken into account in the calculation.

Measurement Results

Ten prototypes were assembled and measured to see the dispersion. No specific tuning was necessary on the PCB or enclosures. By looking at the typical measurement (Figure 11), it was found that the results were very close to the simulation. The NF was 0.1 to 0.15 dB higher than expected, but still very good (under 0.6 db) over 700 MHz of bandwidth. As predicted by simulation, the input return loss validated the concept of the waveguide-to-microstrip transition and the stability was guaranteed by carefully designing the enclosure to ensure that weak coupling would not induce oscillations.

Conclusion

Only one pass was necessary to obtain the predicted performance. This demonstrates the capability of NI AWR Design Environment to simulate a complex RF structure by using the appropriate tool for each type of problem (3D, planar EM, and circuit). The key to success was to correctly understand each problem and approach it in simulation accordingly.

References

1. http://www.cel.com/pdf/datasheets/ne3515S02.pdf.

2. http://www.cel.com:8080/parts.do?command=load&idRootPart=2036#.

3. The Challenge of LNAs for 10 GHz: D. Fässler, HB9BBD – DUBUS 2015.

4. MKU LNA 102 S EME: kuhne-electronic.

5. http://www.digikey.com/en/articles/techzone/2013/jan/rf-shielding-the-art-and-science-of-eliminating-interference.

Special thanks to Vincent Grigis, a HAM radio enthusiast, for his contributions to this article.

©2017 National Instruments. All rights reserved. AWR, AWR Design Environment, AXIEM, Microwave Office, National Instruments, NI, and ni.com are trademarks of National Instruments. Other product and company names listed are trademarks or trade names of their respective companies.

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