Unique Software Tool Automates the Design of
Low Noise Amplifiers
by Dale Henkes, Applied Computational Sciences

Until recently, RF and microwave EDA (electronic design automation) software usually meant circuit or system simulation with little or no capability for fully automated circuit synthesis. In this regard, the software could analyze an existing circuit schematic and suggest changes to circuit component values (based on simulation and optimization) such that certain design goals would hopefully be approached. A number of potential pitfalls exist when this method of circuit design is relied on exclusively.

First of all, the design by simulation/optimization approach requires the user to come up with a circuit to optimize. Requiring that a circuit be entered into the simulator manually or imported from an existing design is not representative of the highest level of design automation. Moreover, no amount of optimization effort can turn a circuit with incorrect topology into one that meets the design goals by simply manipulating the component values. Aside from user errors in selecting a capable circuit topology, an optimization can fail due to issues with the optimizer itself. The optimizer may have to be set up correctly with reasonable initial values. Knowledge of which optimizer algorithms to use from a list of more than a dozen or so, and in which sequence they should be employed, may also be required. And still there is no guarantee of success since the optimizer might get stuck on a local minimum in the error function.

A good synthesis program, on the other hand, should be capable of producing the correct circuit topology and the exact component values. Admittedly, not all kinds of circuit designs will lend themselves to exact circuit synthesis. Broadband or ultra wideband circuit design is an example where theoretical work by H. W. Bode and R. M. Fano indicated that designing a matching network for an exact match to a complex impedance is not possible over an arbitrarily wide band.

Even when exact synthesis is not possible, many simple and complex circuits can be automatically synthesized by a combination of exact synthesis and optimization. A well designed synthesis program should make any optimization employed in the synthesis process as transparent as possible to the user. Ideally, the synthesis software should use exact synthesis or algorithms based on closed form equations whenever modern circuit theory provides for these solutions.

The LINC2 suite of circuit synthesis programs from ACS (Applied Computational Sciences) employs these ideals of exact circuit synthesis over a wide range of circuit types, from the design of simple RF components such as attenuators, baluns and directional couplers to complex multi-stage amplifier circuits. The comprehensive amplifier design suite in the LINC2 Tools menu includes the exact synthesis of single or multi-stage linear amplifiers, single or multi-stage balanced amplifiers, single or multi-stage push-pull amplifiers, and low noise amplifiers (LNAs). In addition to multiple variations on nearly a dozen or so types of lumped and distributed impedance matching networks, the LINC2 circuit synthesis package has recently grown to include filter synthesis as well. Moreover, the amplifier design, impedance matching, and filter synthesis modules include both singe-ended and differential topologies to facilitate direct interconnection to ICs (integrated circuits), ASICs (application specific integrated circuits), and other devices and differential circuits with balanced ports.

To demonstrate the capability of exact circuit synthesis, the following LNA design example is proposed:

Example LNA Design Goals
Frequency of operation: 1960 MHz
Gain: >17 dB
NF (noise figure): < 1.2 dB
Input RL (input return loss): >12 dB
Output RL (output return loss): >12 dB

Design Procedure
The design starts by selecting Amplifier Design | Low Noise Amplifier from the tools menu (Figure 1).

The S-parameter file for the NEC NE34018 GaAs FET device (operating at Ids = 20 mA and Vds = 3 V) is selected from the device library. The design center frequency of 1960 MHz is chosen for the 1930 to 1990 MHz band (Figure 2).

Clicking Stability and selecting Freq Sweep from the View menu displays stability circles over a range of frequencies for the device (Figure 3).

The stability circles intersect the Smith Chart in both the input and output planes, indicating a potentially unstable device. The potential for instability is also indicated by the data printed at the bottom of the window for the highlighted stability circle. Here the K stability factor at 1960 MHz is less than one (K = 0.66).

The stability condition is easily corrected by selecting the desired method from the Options | Stabilize Device menu. For this example a shunt load resistor is chosen. The program automatically determines the required value of loading for unconditional stability. The minimum amount of loading in this case is 149.75 ohms. The option to apply additional loading for increased stability margin is recommended. In this example a load resistor value of 125 ohms was applied in shunt at the output of the device.

Figure 4 shows the results after automatically stabilizing the device. The stability circles are now moved off the Smith Chart and the stability factor K is greater than one (K = 1.0675). Also, Delta = |S11 S22 - S12 S21| is less than one as required for unconditional stability.

The next step is to select Noise, Gain and RL (return loss) tradeoffs from the View menu (Figure 4). The initial conditions for this design method are shown in Figure 5.

The initial default design parameters are set for minimum noise figure (Fmin) with a good output match. Without editing the default parameters, the resulting performance would be 17 dB gain, 0.62 dB NF, 25.5 dB output return loss, and only 5.65 dB input return loss. This meets all the design goals except for input return loss which (at 5.65 dB) falls far short of the 12 dB required.

The input return loss is easily improved by trading off excessive output return loss and noise figure performance. Figure 6 shows the results for entering 1.0 dB for noise figure and moving the RL control toward max input RL (return loss). The slider control makes it easy to trade off any amount of output return loss for improved input match. In this case the slider bar is simply moved to the left until the return loss is split equally between input and output at 14.43 dB.

Figure 6 shows the final design performance at 1960 MHz. As indicated in the figure, all of the design goals have been exceeded as follows: gain = 18.47 dB, NF = 1.0 dB, input RL = 14.44 dB, and output RL = 14.43 dB. Notice that improving the input return loss has increased the gain from 17 dB to 18.47 dB.

Throughout the design process, the program calculates and displays all the circles and related data. For instance, Figure 6 displays constant input and output mismatch circles, stability circles and the constant 1 dB noise circle. The circles and data are updated automatically as the user selects the various design goals or parameters. The input and output match points that will yield the indicated performance are also shown.

This highly automated design procedure practically renders the display of the various constant circles obsolete. In fact the user can usually make all of the required design choices without even knowing what the circles mean. However, experienced users who are accustomed to designing LNAs by manipulation of the constant circles will appreciate the visual feedback. This kind of graphical feedback can help the user know what is possible in regard to performance and why.

The user can continue to investigate the possibilities of trading off one performance parameter for another or accept the current status and have the synthesis program automatically create a circuit schematic that will capture the indicated performance.

Since the currently displayed performance exceeds the stated design goals, the next step is to select the type of input and output matching network from a list of various lumped or distributed topologies and click the OK button to generate the schematic. For this example, series 1/4 wave (electrical length = 90º) and 1/8th wave (electrical length = 45º) transmission lines were used at both ports. The resulting schematic is shown in Figure 7.

The circuit synthesis program generates a live schematic and places it on a page in the Schematic Window. The term "live" schematic means that it is not just a picture of a schematic. The schematic can be edited, component values can be changed, parts can be added or deleted, and clicking Analyze will launch a circuit simulation from the schematic page.

The schematic can be edited to add the gate and drain bias networks and transform the ideal transmission lines to physical microstrip. However, it makes sense to first run a simulation on the LNA circuit as is to verify that the circuit will at least meet the RF requirements using ideal components. Figures 8 and 9 show the results of running the simulation. The simulation verifies that at 1960 MHz the gain is 18.47 dB and the input and output return loss comes in at 14.4 dB each as predicted by the synthesis module (Figure 6).

Adding the DC part of the circuit is a simple matter of selecting a couple of 90º lines from the Parts menu and placing bypass capacitors at the DC ends. Currently, all of the T-lines on the schematic are ideal electrical models. Their parameters of characteristic impedance, electrical length (in degrees) and frequency must be converted to physical dimensions of length and width for a given substrate height before a circuit board can be laid out and fabricated. Anyone who has used a transmission line calculator to go through a schematic and convert all the transmission lines to physical lines will very much appreciate the way LINC2 automates this process.

LINC2 can convert all of the transmission lines on the schematic to microstrip or stripline in one step. Simply selecting "Convert T-Lines to.| Microstrip" from the Auto menu instantly transforms all the lines to microstrip as shown in Figure 10. The schematic now contains all the information necessary to construct the circuit board and build a working amplifier.

Figures 11 and 12 show the results of running a circuit simulation on the complete microstrip LNA schematic. The simulation for microstrip compares well with the simulation using ideal transmission lines. All the original design goals are still met after conversion to microstrip. Only about 0.5 dB of additional loss is reported for S21 across the 1930 to 1990 MHz band due to losses in the actual circuit board substrate material used.

Summary
This LNA design example demonstrated how LINC2 can simplify the complex task of balancing a number of competing design tradeoffs. The article also demonstrated how circuit synthesis and simulation can be used together to speed up the design process by employing a high degree of automation along the way. LINC2 enhances the efficiency of the design process by providing a set of synthesis and analysis tools (including simulation) from within a common design environment. The design flows smoothly from synthesis to verification because all of the necessary design and analysis tools are linked together seamlessly in a single integrated program. The entire LNA design project presented here, for example, was performed in only a matter of minutes using LINC2.

LINC2 is a high-performance, low cost, RF and microwave design solution from Applied Computational Sciences, Escondido, CA. More information on LINC2 can be found on the Web at
www.appliedmicrowave.com.

APPLIED COMPUTATIONAL SCIENCES