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• Electro-Mechanical Broadband RF Switch.
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Fully Matched Cascadable Amp
The TQP3M9009 has been added to the company’s low noise gain block family for high performance 3G/4G infrastructure. This cascadable amplifier is fully matched internally, allowing designers to focus on system level needs. It operates over a broad .05 to 4 GHz frequency range.

Bandpass Filter
Part number 2965-SMA is a 500 MHz bandpass filter. The filter has a typical 1 dB bandwidth of 8 MHz, insertion loss of 6.5 dB and typical 40 dB bandwidth of 52 MHz. It is supplied in a 0.6 x 0.6 x 2.25" SMA package and may be customized for other center frequencies and bandwidths.

UltraFast™ Digitally Programmable LDO
The LT3071 is the second in a family of digitally programmable linear regulators with the lowest dropout voltage, lowest noise, and fastest transient response of any monolithic 5A LDO currently available. Dropout voltage at 5A is an ultralow 85mV. Its QFN package is 4 x 5 x 0.75mm in size.


Microwave Power MMIC
A 4W C-Band GaAs MMIC for satellite applications, the TMD0608-4 operates in the 5.65 to 8.50 GHz range. With this broad bandwidth, a high gain of 27 dB throughout the operating range, and 50 ohm internal matching, this device is well suited for use as a pre-amplifier in C-Band satellite and terrestrial communications.

USB Power Sensors
The U2000 Series USB-based power sensors are compact, portable solutions that allow average power measurements without power meters. All sensors, except the U2004A model, feature internal triggering and trace display capabilities. Current users of these sensors can upgrade their firmware for free.

Directional Couplers
Miniature air dielectric directional couplers are rugged, lightweight devices that offer lower insertion loss than comparable stripline units. The simplified construction allows for greater flexibility in creating customized configurations. Any port can be used as the input with these devices.

Elliptic Lowpass Filter
Part number 2969-SMA is a high order 10 MHz elliptic lowpass filter with sharp transition to the stopband and high stopband attenuation. Typical 1 dB bandwidth is 10.9 MHz with minimum 84 dB attenuation at 13.125 MHz. It is supplied in a 0.6 x 0.6 2.25" package with SMA connectors.

Directional Coupler
Model 110067016 directional coupler has a frequency range of 10 to 67 GHz, 7.25 directivity, and maximum VSWR (any port) of 2.0. Coupling (with respect to output) is 16 +/-1.1 dB and frequency sensitivity is +/-2.0 dB. Operating temperature range is -54 to +85ºC.

Fixed Frequency Synthesizer
The SFS6400A-LF in C-band is a single frequency synthesizer that operates at 6400 MHz. This synthesizer features a typical phase noise of -88 dBc/Hz @ 10 KHz offset and typical sideband spurs of -65 dBc. Its PLL-V12N package measures only 0.60 x 0.60 x 0.13".

Higher Power GaAs FETs
The company has expanded its Ku-Band GaAs FET lineup with two higher output power devices rated for 18 and 30W. Models TIM1213-18L and TIM1213-30L operate in the 12.7 to 13.2 GHz range and are targeted for use in microwave radios for microwave links and satellite communications.
 
EMT SMT Diode TVS Connectors
Now available are transient protection solutions embedded within the connector shell utilizing surface mount (SMT) diodes. Using SMT diode technology allows for increased flexibility in the packaging of transient protection within the connector, saving both space and weight.


Low Noise Gain Block
Model TQP3M9008 is a new low noise gain block that offers high gain over a broad .05 to 4 GHz frequency range. It is a cascadable amplifier that requires no external matching components and can reduce BOMs. The gain block provides 35.5 dBm OIP3, while maintaining a low 1.3 dB noise figure.

 

 

October 2005

AWR SI 2005 Design Suite
by Applied Wave Research

Electronic design automation (EDA) has evolved over the past 20 years as isolated activities for each piece of a design. It has been common practice to separate the electrical design/analysis from the physical implementation domains at both the integrated circuit (IC) and package/module and printed circuit board (PCB) levels. EDA vendors have developed closed methodologies and tool sets for different design phases, requiring manual hand-offs and multiple iteration loops that can result in costly errors and delays. The complexity of today's new technologies, however, bridges these traditional domains and renders traditional design methods inadequate in terms of accuracy, efficiency, and cost. An entirely new EDA approach is required in order to ensure complete design closure between different design phases.

The challenge for high-performance product design teams today is that all these design phases are isolated by separate EDA design and analysis environments, incompatible databases and point tools, and models that are not designed for gigahertz frequencies. Many high-frequency circuit impairments and signal integrity issues, such as delay, noise, distortion, and impedance mismatch, are ignored when signal paths cross the chip, package, and module/PCB boundaries. Separate EDA environments and databases prevent designers from performing signal integrity (SI) analysis early in the design cycle, where it is most critical.

The SI 2005T design suite from Applied Wave Research (AWR®) is a new and highly integrated co-chip/package/module EDA solution developed specifically to address the complex cross-domain signal integrity issues inherent in the design of next-generation, high-performance/high-frequency products. The new solution is architected from the ground up, incorporating a unified data model (UDM) to ensure complete design closure between IC, package, module, and printed circuit board (PCB) design phases. The unique AWR Design EnvironmentT technology encompasses all of these domains, and the data model is high-frequency aware, permitting accurate extraction and modeling of all design elements, including active and passive devices as well as interconnects at high frequency. The new solution is built on an open, standards-based software platform, enabling easy integration of the most capable, best-in-class tools to capture, synthesize, simulate, optimize, layout, extract, and verify designs in all domains.

The SI analysis capability can be applied to a wide variety of design and simulation tasks, including the study of coupled lines, evaluation of electromagnetic (EM) fields radiating into free space, analysis of dielectric losses, three-dimensional modeling of thru-wafer vias in ICs or plated through-holes in modules and PCBs, and investigation of the effects of losses due to metal skin effects. Most metal skin-effect models assume that the metal has infinite thickness with losses that are constant with frequency. The AWR SI 2005 design suite can model device metal layers with finite thickness, calculating metal resistance as a function of frequency. The software can also accurately model dielectric losses. Conventional tools assume constant relative permittivity for a dielectric loss model, with constant loss tangent. The AWR SI 2005 design suite features dielectric models with loss tangent and permittivity that vary as functions of frequency.

Many of today's device and module solutions include mixed-signal formats, and the AWR SI 2005 software is specifically designed to accurately model the second-order effects of layouts, interconnections, and packages on ultimate performance. In contrast to separate design and analysis solutions, the AWR SI 2005 design suite brings all design domains into a single platform, allowing easy movement and design/analysis flow between ICs, modules, packages, and PCBs. It allows designers to simultaneously examine such disparate technologies as gallium arsenide (GaAs) and silicon ICs, multilayer PCBs, and low temperature cofired ceramic (LTCC) modules within a common environment. The software can generate a wide range of result formats, including S-parameter data, bit-error-rate (BER) plots, eye diagrams, error-vector-magnitude (EVM) plots, adjacent-channel-power-ratio (ACPR) plots, and in-phase/quadrature (I/Q) scatter plots.

Interconnect-driven design with iNet technology
The AWR SI 2005 design suite provides comprehensive SI analysis capabilities as part of its breakthrough Analog OfficeT Intelligent NetT (iNet) technology. The iNet technology is based on accurate top-down and bottom-up interconnection and radio-frequency (RF)/microwave modeling methodologies that streamline and simplify the design process and support model extraction on complex cross-domain interconnections.

Gigahertz broadband SI issues are difficult to tackle because they cross so many boundaries. Because of the complex interactions of many effects, AWR SI 2005 design suite approaches the problem in two completely new ways. First, the product enables interconnects to be designed in a top-down process and, second, it provides procedures in this process for exploring the depth and breadth of SI issues. The first task is accomplished by incorporating AWR's industry-leading RF/microwave technology at the core of the software. Using the AWR Design Environment unified data model, interconnects can be defined at the circuit level and then manipulated through multiple representations as the problem solution evolves: layout, EM, extraction, system, etc. This is combined with AWR's X-models-3D EM model accuracy with the speed of circuit models-and integration to the PCB tools that couple with this top-down flow and allow SI physical information to be brought back into the interconnect design subflow.

The second task is accomplished using the AWR Design Environment technology. Through the unified data model, all manifestations of the interconnect-circuit, layout, EM, extracted, system, etc.-are simultaneously represented and available. SI engineers can switch "views" of the interconnect, without the need for translations, loss of information, and desynchronization of the database. Furthermore, the AWR Design Environment open architecture enables the SI designer to use multiple, complementary tools for the same task to bring the best approach to bear on the problem.

Industrial Strength EMSight
The typical RF/microwave approach to SI design problems is to put the whole PCB or module into a three-dimensional (3D) EM solver and wait for a week to get an answer. This approach has gained in popularity because 3D EM solvers can be shown to provide compelling accuracy for some of the toughest SI problems. The problem with this approach is that all the engineer gets is "go/no-go" answers. If the EM solver does not crash and a solution is returned, the jumble of coupling data is difficult or impossible to pick apart in order to discern the primary and secondary physical mechanisms at the root of the SI problem for that design. 3D EM, and all EM methods, have value in specific subsets of the SI problem and are valuable tools in unraveling SI issues. However, it is rare, when putting an entire 12-layer LTCC into an EM solver, that it will yield the root cause of SI problems. Where other SI/EM solutions crash, the AWR EMSightT technology in the SI 2005 design suite succeeds. The matrix solvers have increased capacity, which eliminates the memory limitations of previous versions (typical limit of 8000 unknowns in 1GB of RAM). Now, problems can be solved with 50,000+ unknowns in 512MB of RAM using dense out of core direct matrix solvers - there are no practical limits.

Support for multiple EM simulation and analysis tools
AWR SI 2005 design suite offers the broadest range of EM solvers, all with their own strengths when it comes to tough SI problems, which can be used to partition the problem and get accurate answers. SI solutions available today are generally based on technology developed for SI issues at a few hundred MHz. These solutions "hit the wall" when distributed coupling and broadband considerations come into play in applications approaching and above 1 GHz, where significant signal energy may be found well in excess of 10GHz. For these highest-performance designs, interconnects are best-modeled in the frequency-domain with EM or EM-based models. The AWR SI 2005 design suite supports multiple technologies for traditional bottom up SI as well as top-down interconnect design in all design domains. The software package includes all the features of AWR's RF/microwave design software: concurrent design, logical/physical design, EM table-based models, and EM SocketT open integration. For the first time, engineers can design interconnects as well as analyze them. The software builds on AWR's proven, industry-leading interconnect modeling and simulation technology by adding time-domain simulation and a closed-loop flow with major PCB tools.

Through AWR's EM SocketT open standard interface, the SI 2005 design suite users can access a broad variety of EM simulators from leading vendors, without leaving the SI design environment. The underlying technology can interface with virtually any EM simulator and seamlessly integrates third-party design tools into the SI design flow. Users can combine multiple EM algorithms, such as finite element analysis, finite difference time domain (FDTD), and a variety of method-of-moments approaches to solve planar and full 3D problems. The solution facilitates greater flexibility in the design methodology, while providing a common user interface.

Signals: internally or test-generated, IBIS, or MatLab co-simulation
As clock rates and signal speeds increase, designers have found that a simple current source is insufficient to model the complexities of fast, leading-edge signals, variable fan-outs, dense interconnects, and complex loads and receivers. The SI 2005 design suite supports several ways of generating signals for SI design and analysis. The simplest way is to use the internal frequency- and time-domain sources. By adding on AWR's TestWaveT software, signals can be acquired and used directly from test equipment or from the designer's own device hardware. IBIS is also supported and, if models are available in MatLab, AWR's Visual System SimulatorT (VSS) system simulation tool co-simulates with MatLab to bring the signals right into the AWR Design Environment platform, where trade-offs can be made in real time.

Flows into industry-popular third-party tools
The ability to design interconnects as part of a top-down, SI flow is unique. SI design suite offers a truly useable design flow by creating a closed-loop flow to popular, enterprise PCB tools. Schematics and layouts can be exported to Mentor Graphics' Board Station or Expedition using libraries and footprints automatically generated from Mentor's PCB tools, LMS, or DMS, and can continue in the enterprise PCB flow for bill-of-materials (BOM) generation, routing, and design-for-manufacturing (DFM). High-speed, multi-level traces of interest can be brought back into the SI 2005 design suite and analyzed as-is or with user-selectable adjacent metal.

Integrated with Synopsys' HSPICE for fast and accurate simulations
AWR's frequency-domain engines are included in the AWR SI 2005 design suite, and are integrated with Synopsys' gold standard HSPICE software, providing the fastest, most accurate, highest capacity simulations, as well as hundreds of foundry-proven built-in device models for most commercial IC foundries.

Pricing and Availability
The AWR SI 2005 design suite is available as a stand-alone product for new users or as an upgrade to existing Analog OfficeT and Microwave Office® design users. It is available for Linux and Windows XP operating systems on the personal computer. P&A: $15,750 and up; stock.

APPLIED WAVE RESEARCH

 


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