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The
Increasing Importance of Signal Integrity in Next-Generation
Communications Designs
By Mike Heimlich, Applied Wave Research, Inc.
Introduction
Signal integrity (SI), at its most fundamental level, involves
the electrical performance of components through which signals
propagate within an electronic product. SI is a matter of
basic physics and as such has remained relatively unchanged
since the inception of digital computing devices. Products
as old as the circa 1940 Western Electric crossbar telephone
exchange suffered the basic effects of ringing, crosstalk,
ground bounce, and power supply noise - the same issues
that plague modern communications products.
Until recently, chip and board speeds, geometries
and interconnect dimensions, and design and manufacturing
technologies had sufficient margin that signal propagation
was not a consideration, and the electrical characteristics
of the underlying circuits could, to a large degree, be
ignored. Digital, analog, and analog-mixed signal designers
have lived in blissful ignorance of Maxwell's Equations,
which define the physics of signal propagation, getting
by for decades with expedient and effective simplifications.
The wireless explosion and the impact of Moore's Law, however,
have driven the convergence of combined technologies in
a system-in-package (SiP) approach that has created a very
different SI landscape than what was standard only a few
years ago.
Self-defined as "cramming more components onto integrated
circuits," Moore's Law has single-handedly changed the communications
design world by enabling data rates well into the gigabyte-per-second
(GB/s) range. With minimum features on the order of tens
of nanometers, traditional silicon IC processing easily
reaches clock rates in the tens of gigahertz (GHz). The
nearly endless supply of gates on a single die has spawned
system-on-chip (SoC) technology, where analog, digital,
and RF can be realistically integrated into a single solution.
At these technology nodes, the performance and correctness
of a design cannot be assured without considering SI that
takes into account more complete representations of Maxwell's
Equations.
Many of the problems new to the IC and printed circuit board
(PCB) world have been a reality for decades in RF/microwave
design. Applied Wave Research, Inc. (AWR®), an industry-leading
expert in RF/microwave design software with years of practical
experience designing microwave circuits, has developed a
software design suite specifically targeted to SI design.
Many of the tried-and-true techniques and proven solutions
used in microwave design have been integrated into the AWR
SI Design SuiteT, making them easily accessible to IC and
PCB designers. In this article several common SI design
problems are examined and solutions made possible with the
use of this unique software are discussed.
Problem: Dispersive Interconnects
At frequencies up to a few hundred MHz, current on an IC,
package, or PCB metal interconnect generally behaves itself
and its distribution across the conductor's cross section
remains constant, making it very easy to model short, coupled
lines with resistors (Rs) and capacitors (Cs). By making
the lines a little longer, it is also possible to extend
this modeling approach with the introduction of some inductance
(L). Standard SI technologies have taken advantage of this
with fast extraction and reduction techniques using RC and
RLC networks or RLCK, if coupling is needed.
When the frequency is increased a little bit further,
however, something odd begins to happen: the wire loss is
no longer constant. The current, rather than being evenly
distributed throughout the wire, begins to crowd toward
the surface at a frequency-dependent rate. Coupled with
dielectric losses that also vary with frequency, this results
in interconnect properties that are dispersive and lumped
element techniques break down, as shown in Figure
2.
The simplifications to Maxwell's equations that make RLC
practical at lower frequencies break down at these frequencies.
RF/microwave designers encountered this problem many years
ago and created dispersive transmission line models such
as microstrip, stripline, and coplanar waveguide, which
incorporate the frequency-dependent characteristics of the
lines in a single model that runs from DC to 100s of GHz.
AWR SI software uses these models, which have been proven
over tens of thousands of designs. Moreover, the software
uses the same model regardless of the simulator.
Problem: Broadband Signal Energy well into the
GHz Range
Square waves and pulses have broad frequency content, as
shown in Figure 3.
When frequencies were lower, this was not a major issue
because the interconnects' properties were constant over
frequency range where the signal had significant energy.
Also, the materials being used became much more lossy at
higher frequencies and the design could be almost certain
that the very high frequencies in the signal would be minimized.
Operating above a few hundred MHz means that each frequency
comprising the square wave or pulse sees a unique set Rs,
Ls, and Cs from the same set of interconnects. Such dispersive
interconnects also imply that SI at higher frequencies will
be affected differently than at lower frequencies, thereby
degrading the overall signal. For example, a very high frequency
component of the signal may now resonate, depending on the
line length and other interconnect properties. This causes
problems such as ringing, and contributes to ground bounce.
Traditional SI tools assume that signals go from DC to the
frequency corresponding to the data or clock rate. Figure
3 shows that, depending on signal-to-noise ratio of the
system, a 1 GHz clock can be affected by frequencies well
in excess of 20GHz. Like the transmission line models, the
entire AWR SI environment of tools--drivers, receivers,
measurements, simulators, analysis, and layout--have all
been used at frequencies well in excess of today's fastest
clocks.
Problem: Multi-domain Analysis
For the design of ICs, an IC suite with IC timing analysis
is needed. For the design of PCBs and modules, a PCB tool
with SI tools is required. In the GHz range, the packaging
of the die not only degrades the performance, but couples
to the operation of the die, making it almost impossible
to design the IC separately from the package. All of these
issues are compounded when the preciously packaged IC is
integrated onto a PCB, as seen in Figure 4.
Traditional IC tools are difficult to adapt to PCB design
because they do not support packaged components very well
and PCB tools have a limited notion of continuously scalable
layout cells. The result has been flows that span half a
dozen or more disparate tools, which requires that data
be translated, designs be manually repaired, and the database
be synchronized by hand, all with no guarantee of closure
across the domains.
The AWR SI Design Suite leverages the fact that microwave
designers have been doing "chip and board" design for decades.
The single, integrated AWR design platform does not differentiate
among IC, package, and chip; consequently, all three design
issues are addressed on an equal basis within the same project
without the need for translation.
Problem: Multi-domain SI Late in the Flow
It has already been mentioned how difficult it is to bring
all the pieces of a design together for SI due to the span
of multiple technologies. It is also extremely costly because
SI analysis typically is applied very late in a serial,
"waterfall" design process. By the time the IC design has
progressed far enough to add it into the package or onto
a module, many design constraints have been finalized, thereby
limiting the available options when confronting SI issues.
A major portion of this problem stems from the fact that
top-down design flows separate out logical from physical
design, forcing the designer to wait until the former is
nearly completed before beginning the latter.
GHz design, by its nature, considers the coupling of circuit
and layout, so that the logical design must be done concurrently
with the physical design. AWR SI technology leverages this
process by supporting a concurrent methodology that actually
allows SI engineers to be involved in the earliest stages
of the design process to support SI design--the parametric
definition, and access to the layout of interconnects during
logical and physical design--while still supporting a full
SI analysis suite at the back end.
Problem: Signal Sources and IP Access: IBIS, Encrypted
HSPICE, and MatLab
Component vendors and other intellectual property (IP) providers
walk a precarious line. They need to provide their customers
with compact, efficient, and accurate models for the pin
I/Os on their parts, but, at the same time, they don't want
to give away the "family jewels." One approach proposed
by some is to simply use the ideal voltage and current waveforms
coming out of drivers. The problem with this is that it
does not capture the subtle, dynamic impedance changes of
the driver, nor the nonlinear loading of the driver by the
interconnect and receiver. Simply designing something like
an LVDS driver with a DC or low frequency impedance of 50
ohms (Figure 5) misses the dramatic impedance
changes for broadband designs.
IBIS and SPICE models are a good solution, but they can
expose too much information about vendors' technology. Encrypted
HSPICE, as shown in Figure 6, has been
a popular solution, and MatLab has been gaining support,
but these are proprietary solutions.
AWR SI Design Suite supports all of these
technologies. The integration of MatLab and HSPICE directly
into the AWR design environment ensures that SI design and
analysis has direct access to all the most popular signal
sources--protected and open--from component vendors.
Summary
This article has highlighted several key issues faced by
designers of today's complex communications devices: dispersive
interconnects, broadband signal energy in the GHz range,
multi-media SI analysis late in the design flow, and accurate
signal sources that don't compromise vendor IP. Traditional
electronic design software was not developed to address
these relatively recent problems, which have arisen due
to the demands of next-generation communications devices,
the resulting complexity of PCBs and modules, and the migration
into the higher GHz ranges.
The AWR SI 2006 Design Suite is a new and highly integrated
co-chip/package/module EDA solution that has been developed
specifically to address these SI issues inherent in the
design of next-generation, high-performance/high frequency
products. The solution is architected from the ground up,
incorporating a unified data model (UDM) capable of supporting
multiple domains and technologies to ensure complete design
closure between IC, package, module, and PCB design phases.
The unique AWR design environment encompasses all of these
domains, and the data model is high frequency aware, permitting
accurate extraction and modeling of all design elements,
including active and passive devices as well as interconnects
at high frequency. The new solution is built on an open,
standards-based software platform, enabling easy integration
of the most capable, best-in-class tools to capture, synthesize,
simulate, optimize, layout, extract, and verify designs
in all domains.
APPLIED WAVE RESEARCH
www.mwoffice.com
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