GaN-on-Si RF Power Transistors Combine High Performance and Affordability
by Ray Crampton, Director of Marketing, Nitronex

Several challenges exist for a new technology such as gallium nitride (GaN) to be broadly accepted in the market. Most important is a premium performance/price position along with demonstrated reliability and an established supply chain. Less appreciated, but also important is the need to make the technology easy for design engineers to use during fast development cycles. GaN-on-Si devices are unique in offering performance, cost, reliability, and availability. The ease of use problem is most readily solved by GaN technology providers developing the expertise and sharing it with the design community. This article compares substrate choices and addresses some of the common questions about GaN-on-Si in the context of these requirements.

Substrate Choice, Cost, and Availability
Since there is no native GaN substrate, the most fundamental choice a GaN manufacturer makes is what substrate to use. Research and development efforts to date have yielded Si and SiC as the only practical substrates for RF power devices. SiC has a relatively good lattice match to GaN, easing epitaxial growth. The primary issues with SiC substrates are cost and availability. A 3” SiC substrate costs roughly $2000-$3000 ($4000-$6000 in 4” equivalent terms). Although 4” SiC substrates are in development and could potentially cut costs in half, they would still be 20 - 40 times as expensive as the substrates used in any RF power device widely available today. Si is much less expensive, with 4” substrates readily available at less than $50, but the techniques to handle the lattice mismatch between GaN and Si appropriately are difficult to solve. To date, only Nitronex has produced a reliable, high performance GaN RF power device on a Si substrate.

Substrate availability is an under appreciated issue when comparing Si and SiC. Unlike SiC, high resistivity Si substrates of 4” and larger are manufactured to an industry standard SEMI specification and are readily available in extremely high volumes from numerous sources. By contrast, there is no industry recognized specification for SiC substrates. Thus, quality varies among suppliers, with only a few practical choices. SiC substrates are also extremely difficult and time-consuming to produce, significantly limiting overall capacity of SiC within the substrate industry. While this is not an issue in space and other high reliability applications, it limits use in more cost-sensitive and high volume production markets.

GaN-on-Si Device Reliability
To be accepted by most power amplifier suppliers, RF power devices must meet industry expectations for reliability. Nitronex has published qualification reports of all production ready devices on its web site. The full suite of JEDEC tests typically required by commercial off the shelf (COTS) components for military and wireless infrastructure customers have been passed and review of the data in the industry has been well accepted. Figure 1 shows the mean time to failure (MTTF) curve for the NRF1 product platform. 1e6 to 1e7 hours is achievable at normal operating junction temperatures, with end of life being a soft failure defined as 15% reduction in IMAX.

The use of a silicon substrate has other less apparent reliability advantages in the packaging arena. Si LDMOS and bipolar power devices have driven packaging technology for decades. There is a solid understanding of die attach and packaging techniques for silicon based devices which is leveraged when working with GaN-on-Si devices.

Performance Advantages
The core performance advantages of GaN power HEMTs are high electron mobility and high power density. GaN devices are similar to GaAs pHEMTs in frequency response, allowing circuit designers freedom to work well into X and K band applications with appropriate gate lengths. Power densities of 2.5-5.0 W/mm are common using GaN HEMTs, compared to 0.7 to 1.5 W/mm for LDMOS and GaAs. This higher power density results in smaller FETs for a given power level, leading to lower parasitics and better power sharing across the device. Lower parasitics makes devices easier to match across both narrow and broad bandwidths, and allows larger unmatched power devices to be offered. A comparison of power transistor properties for selected GaAs, LDMOS, and GaN devices is shown in Table 1.

Cost Competitiveness
GaN-on-Si RF power transistors are still relatively young in terms of cost optimization. Foundry volumes are relatively low compared to GaAs FETs and Si LDMOS, and yields are expectedly lower. In recent years, GaN-on-Si has steadily progressed in these areas, with impressive value offers today. The NPT25100 by Nitronex, for example, is offered at less than $1 per watt in 1k quantities. In high volume, high power, cost-optimized solutions, GaN has come within striking distance of some Si LDMOS devices, even being less expensive when other systems savings contribute to the overall benefit.

Helping Designers Work with GaN
Many designers have been working with LDMOS or GaAs for decades and have reliable rules of thumb and reference circuits that help them develop amplifiers quickly. Nitronex launched the GaN Essentials™ initiative to show similarities and differences compared to other technologies and offer other helpful information for RF power amplifier designers. Three of the most broadly useful concepts addressed in the GaN Essentials™ papers are shown here.

1. Gate and Drain Biasing
GaN HEMTs use a Schottky gate which can forward conduct at the peaks of an RF signal during high input drive. This can result in current flowing into the gate when devices are a few dB into compression. Si LDMOS devices use a metal-oxide gate which is insulated from the drain and source from a DC perspective. Traditional Si LDMOS bias circuits often cannot source enough gate current to keep a GaN HEMT biased properly in compression. While the analog circuitry required to both source and sink current to the gate is not complicated, gate current is often overlooked and causes problems for designers. There are many ways to approach this problem; the technique shown in Figure 2 is common for larger power devices. Simplified circuits are often used for more cost sensitive applications.

2. Thermal Design
While high power density is a critical part of the performance advantage of GaN HEMTs, it also poses a challenge from a thermal design perspective at both the device and board level. At the device level, the power density requires careful FET layout to spread heat across the die and careful packaging to ensure consistent, low thermal resistance die attach. At the board level, it is critical to optimize thermal grease techniques for bolt-down flange devices. Additionally, it is even more critical to optimize via pattern design under surface mount packaged parts.
Worst case thermal conditions for the overall system must be carefully calculated. While GaN device manufacturers are working to reduce thermal resistance in each generation of power devices, GaN’s thermal resistance is higher than its Si LDMOS counterparts. For the devices shown in Table 1, thermal resistance is roughly three times higher for the GaN devices over the Si LDMOS devices. While this is often not a problem, it should be checked to make sure MTTF and performance targets can be met.

3. Robustness
Many power amplifier designers have found GaN to be highly robust to harsh environmental conditions. High peak-to-average signals, severe output mismatches, and input overdrive are common examples. Due to the power density of GaN, high peak-to-average signals are a natural fit since they reduce average thermal loading while requiring high peak powers. GaN HEMTs robustness to output mismatch can mean less protection circuitry compared to Si or GaAs FETs, and lower failure rates for the end customer. The NPTB00050, for example, has been shown to survive a 20:1 mismatch in power saturation with minimal performance degradation[7]. Repeat tests on the same devices showed no further degradation. GaN HEMTs are also robust to input overdrive, the limit typically being imposed by gate metal electromigration due to gate current.

Conclusion
GaN HEMT technology is being increasingly recognized and accepted as the technology of choice for high power and high frequency applications that have traditionally been supported by GaAs devices. It is also encroaching on Si LDMOS applications that require improved robustness and performance over bandwidth. Relative to other GaN HEMT solutions based on other substrates, GaN-on-Si offers economical, scalable, mature and high quality devices. As future generations of device technology improve performance, GaN devices will continue to battle other Si and GaAs technologies to carve out a larger share of the RF power amplifier market.

Notes
1. Nitronex NPTB00004 Data Sheet, www.nitronex.com
2. “Power Dependent Input Impedance of Field Plate MESFETs,” T.A. Winslow, 2005 IEEE Compound Semiconductor IC Symposium, Oct. 30, 2005, pp. 240-243.
3. “Robustness of Field Plated MESFETs,” T.A. Winslow, IEEE International Microwave Symposium, pp. 315-318, June 3, 2007.
4. “12-Watt 0.7-2.7GHz Power Amplifier MMIC Developed Using MLP Technology,” Bahl, I. J., Microwave Theory and Techniques, IEEE Transactions on, Volume 55, Issue 2, Part 1, Feb. 2007, pp. 222 – 229.
5. Nitronex NPT25100 Data Sheet, www.nitronex.com
6. Freescale MRF6S9125 Data Sheet, www.freescale.com
7. Nitronex app note, AN-004, www.nitronex.com

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