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New Silicon Microwave Power Transistor Simplifies RF Design
By Brian Battaglia, Phuong Le, Mike Watts, HVVi Semiconductors Inc.
Over the last few decades, designers of microwave communication systems and subsystems have leveraged ongoing advances in CMOS semiconductor process technology to integrate a variety of digital and analog components and dramatically reduce the size and weight of their systems. One of the few exceptions has been high power amplifiers (PAs) [1]. For the most part, designers of these crucial components have not been able to take advantage of the rapid size and weight reductions seen in other parts of microwave communications systems for two important reasons. First, the high performance requirements of PAs have made it extremely difficult to integrate these functions into CMOS fabrication processes. Second, due to their high performance characteristics, PAs generate significant amounts of heat which must be dissipated away from other system components to ensure high reliability.
State-of-the-Art Technology
Over the last few decades, power semiconductor manufacturers have made continual progress in their struggle to increase power density, performance and gain without compromising reliability. But progress has been slow. Invariably designers must trade off benefits in one performance characteristic to achieve advances in another. Recently, however, engineers at HVVi Semiconductors have developed a new power transistor architecture that addresses many of these limitations. The following article details the use of this technology to build a single-ended Class AB solid-state amplifier for IFF (Identify Friend or Foe) applications operating in the 1030MHz to 1090MHz avionics band.

This new power transistor architecture uses a High Voltage Vertical FET (HVVFET™) to achieve high operating voltage and extremely high power packing density. This approach offers many advantages to the power amplifier designer. High voltage solutions help the circuit designer by simplifying matching of the discrete device. Achieving high power through high voltage raises device impedance levels, enabling circuit matching networks with fewer components in a smaller area. As a result, the matching circuit is not only a smaller, less expensive solution, but offers higher reliability as well because there are fewer parts with the potential to fail. This matching circuit also exhibits less loss than lower impedance solutions which have a higher transformation ratio to the desired impedance of 50 ohms.
This new architecture also helps reduce cost by lowering the high cost of packaging a discrete die. The vertical structure exhibits more than twice the power density of LDMOS, producing higher power in a smaller package. The smaller package footprint results in a sizeable savings in cost, size and weight. By reducing component count, this new technology also helps simplify manufacturing and reducing the number of errors from component placement of the high volume pick-and-place equipment. Indicative of this advantage, the active device for the first stage of the amplifier described below, which is rated at 35W of output power, can be housed in a surface mount package which can also be assembled using the same high volume manufacturing equipment.
In general, the key elements of this new technology drove the design of the power amplifier:
• Use of a single positive voltage supply
• Use of an entire line-up of power transistor components using a single 48V supply
• No need for external protection circuitry

System Advantages
Although individual HVVFET-based devices offer some advantages over competing technologies in terms of power density, gain and efficiency, the technology’s real advantage becomes apparent at the system level. The new devices help simplify power supply design in a number of ways. First, as enhancement mode devices, HVVFETs only require a single positive voltage supply. Traditional compound semiconductor solutions are significantly more complex because they require both positive and negative voltage supplies. Secondly, using this architecture, all the devices in a product family ranging from tens of watts to several hundred watts operate at a 48V drain bias voltage. This allows the system designer to use a single power supply for the entire power amplifier line-up. In contrast, other technologies rely on a multi-tier approach where high voltage supplies support the high power devices operating at hundreds of watts, and lower-voltage 28V or 12V power supplies are used for the driver stages with power levels from tens to one hundred watts.
Third, this new HVVFET-based technology eliminates the need for additional circuitry to regulate the DC drain voltage to different levels depending on the size of the device. Finally, the new architecture exhibits extreme ruggedness. RF power transistors are specified to withstand a VSWR of 20:1 at all phase angles or about 10 times as high as silicon bipolar devices and 25 times the level of LDMOS devices. While other technologies require isolators/circulators for protective circuitry in the output stages, the high level of ruggedness inherent in the HVVFET architecture allows designers to eliminate those devices. Since isolators are typically composed of magnetic ferrite material and are very heavy, this advantage not only reduces system cost but weight as well.
Pallet Design
Figure 1 depicts a single-ended pulsed L-Band amplifier using RF power transistors fabricated in this new architecture. Figure 2 shows a 35W surface mount driver stage that is cascaded with two 300W devices in parallel to produce a 2-stage high gain, high power design. The DC bias feeds, which provide the voltage to power the RF devices, are designed for high robustness, using large value capacitors in the uF range to suppress the low frequency oscillations associated with DC supplies. The PCB design integrates DC blocking capacitors that allow the pallet to be evaluated as a system building block.

The three RF power transistors are mounted on a compact PCB of just 2.5 by 3.5 inches utilizing low-cost Arlon Teflon material. The Teflon material has a low dielectric constant of 2.55. If the application requires a smaller footprint, designers can opt for different PCB materials that have less loss and higher dielectric constants to shrink the design size even further. As an example, materials with dielectric constants = 3.55, 6.2, or 10.2 are commonly available.
While high power density and small packages allow designers to shrink the PCB in the xy-direction, the technology’s excellent thermal performance permits the use of a smaller heatsink, which allows the designers to reduce the system in the z-direction. Most power amplifier designs use expensive copper or copper laminates as the heat sink because the metal offers excellent thermal properties. However, copper is very heavy compared to aluminum heat sink material. By taking advantage of the HVVFET’s excellent thermal performance, designers in this project were able to move to a lighter, thinner aluminum heat sink and reduce both weight and thickness This capability proved especially advantageous given the system’s intended use in a weight and footprint-constrained airborne avionics application. Figure 3 summarizes the system level advantages of designing with transistors using this new device architecture.

RF Performance
The pallet was tested under the following conditions: the system was operated in 1030/1090 MHz band with a 50 µs pulse width and 2.5% duty cycle. VDD for all three devices was 48V and low IDQ level was 120mA.
Under these conditions, the IFF pallet produced over 600W of output power with more than 34dB of gain using just two stages. A comparable silicon bipolar solution would need four stages of amplifiers to achieve the same level of performance. The designers were able to eliminate amplification stages because the new devices offer more than 3dB higher gain than comparable LDMOS devices and 10dB gain better than comparable bipolar pulsed solutions. By reducing the number of driver devices as well as associated external supporting components including capacitors in the RF input and output match, the designers were able to dramatically reduce PCB footprint and power requirements. Figure 4 shows the system level performance graphs. Table 1 summarizes the data.

Conclusion
While today’s microwave communication systems require higher power amplifiers to maximize the signal range, they must deliver this capability without sacrificing efficiency, size or reliability. The power amplifier design described above illustrates how new technologies like the HVVFET can save power and reduce system footprint by eliminating the need for dual voltage power supplies, DC/DC voltage regulator circuits and external output device protection circuitry. Ultimately, the unique characteristics of this architecture, along with advances in packaging technology, allowed designers to produce a novel RF power FET that significantly improves power transistor performance by combining superior thermal management, high breakdown voltage, and high RF gain with extreme ruggedness.
Acknowledgement
The authors would like to acknowledge the contributions of Mike Purchine for hardware verification testing and software test support and Robert Neeley for assistance with the measurements and assembly of the hardware.
References
[1] Comtech PST, “High-Power Broadband Amplifier System Covers 20 MHz to 3 GHz,” Microwave Product Digest, June 2008.
HVVi Semiconductors Inc.
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