Ultra-Low Jitter Clocks for High-Performance Digital-to-Analog Converters
By Ramon Cerda, VP of Engineering, Crystek Corporation
Most, if not all, music today is now recorded digitally. Initially, an Analog-to-Digital converter (ADC) was used to record and store the music in a myriad of different electronic media. These can include compact disks (CD), computer hard drives, cell phones and USB sticks, to name a few. For us to hear the music, it has to be converted back to the analog domain. This is accomplished with a Digital-to-Analog converter (DAC). This paper will exemplify how the DAC output quality is directly affected by the jitter/phase noise performance of the clock feeding the DAC.
Figure 1 is high level diagram of a typical Digital Audio Unit (DAU) application set-up. Such units are available from under $100 to over $15,000 for the high-end audiophile market. The original digital audio source may have been sampled at different rates. The typical CD digital data is sampled at 44.1 KHz (16-bits) while high-end recordings are sampled at 192 KHz (24-bits) and higher rates using high-resolution ADCs. Some DAUs even have the capability to up-sample the incoming 44.1 KHz rate to a higher rate for enhanced audio fidelity.
An ideal and a clock signal with jitter are depicted in Figure 2. Jitter causes each period of the clock to vary randomly (period jitter) with a certain probability distribution function. The Gaussian probability distribution is typically what is seen. It is also called random jitter.
Deterministic jitter is created, for example, by the switching frequency from the power supply modulating the clock source. In this case, the reconstructed signal will have sidebands at the switching frequency and its multiples. These sidebands are not harmonically related to the desired signal, making them particularly unpleasant to listen to.
Jitter on the DAC clock raises the noise floor and distorts the reconstructed signal. An exaggerated drawing of distortion on a reconstructed signal is shown in Figure 3.
A DAC resolution, N, is 2N × LSB (least significant bit) which determines the maximum analog output. Therefore, a DAC with N=16 bits is capable of reconstructing a signal using 65,536 steps. However, the effective number of bits (ENOB) in a DAC is a function of the signal-to-noise ratio (SNR), but in turn SNR is a function of the clock jitter. That is,
Where Δt is the RMS jitter in seconds, ƒ is the signal frequency, ƒ0 is the bandwidth of noise measurement in Hertz, and ƒs is the sampling frequency. Now, ENOB is given by
The above equation assumes that the DAC has no distortion and the SNR equation is the theoretical limit. Hence, jitter on the sampling clock directly impacts the SNR and ENOB on the DAC. The plot below (Figure 4) was plotted using the condition that: The signal frequency ƒ = 5 KHz, the sampling frequency ƒs = 100 KHz, the noise bandwidth ƒ0 = 20 KHz as a function of jitter being swept from 1 nS to 10 nS RMS.
Solving for SNR in the preceeding equation we have,
Hence, a 14-bit system would require a theoretical SNR of 86.04 dB.
The above discussion now leads us to define/describe what makes a good clock source for high-performance DAC applications. Many digital audio equipment manufacturers use clock sources at 22.5792 MHz and/or 24.576 MHz inside the equipment. They also use double these two frequencies, that is, 45.1584 MHz and 49.152 MHz. And in this application, phase noise is critical. Jitter in a clock will directly distort the signal, enough that the listener will actually hear the difference in audio output.
To achieve the required and expected audio fidelity standards, DAC manufacturers need to source a high-performance oscillator that is built around a well-designed, very high-quality crystal to keep phase noise low. Any old oscillator with just another crystal blank won’t fit the bill. Traditionally, this has translated into very expensive oscillator products.
But, this being the consumer electronics market, manufacturers are under pressure to compete on price with each other, even manufacturers of the “high-end” audiophile equipment. Every component inside their equipment is scrutinized for optimum performance but at low cost. Through this, DAC manufacturers still need an oscillator that will give them the performance they need.
Crystal oscillator manufacturers have met the challenge of designing and producing clock oscillators with phase noise and jitter performance as good as those from a part costing hundreds of dollars, while achieving $30 single-piece pricing. Crystek’s model CCHD-957 family, for example, was specifically designed for the digital audio market. The phase noise for the 24.576 MHz variant is shown below (Figure 5). It is a superb performance being generated from a tiny 9 x 14 mm package.
Walter Kester, “Converting Oscillator Phase Noise to Time Jitter”, Analog Devices MT-008 tutorial.
Robert Watson, Richard Kulavik, “Digital Audio”, Presentation slides, Burr-Brown.
Maxim Integrated, “Digital-to-Analog Converters Are a “Bit” Analog”, Tutorial 1055.
Decapton Wang, “Effects of Clock Noise on High-Speed DAC Performance”, Application Report SLAA566, December 2012.
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