Design and Evaluation of a 125W L-Band GaN Power Amplifier

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by Andy Dearn and Robert Smith – Plextek RFI

The scope and performance of commercially available Gallium Nitride (GaN) discrete transistors is steadily increasing and the parts now available from leading manufacturers have impressive RF performance in terms of their available gain, RF output power and efficiency. For RF output powers in the order of tens of watts, SMT packages can be considered. For higher output power levels, metal-based ceramic packages can be used. This greatly improves the thermal performance, as the source of the device is directly connected to the heatsink. This article demonstrates that excellent performance can be realized at L-band from a low-cost packaged transistor. The design and evaluation of a single stage 125W L-Band GaN power amplifier is described. The amplifier is optimized for the 0.96–1.215 GHz band, with a typical band center gain of 20 dB and output power at P-3 dB of +51 dBm (125W) at a PAE (for the connectorized amplifier) of greater than 70%. The design is based on a commercially available discrete 0.25µm GaN transistor, the QPD1008 from Qorvo, which is housed in an industry-standard NI360 metal-based ceramic package (of which the non-flange mount version is shown in Figure 1).

Figure 1: The QPD1008 GaN transistor from Qorvo

Design

The transistor is mounted on an aluminum carrier machined so the package tabs interface to the selected PCB material; 32 mil thick Rogers 4360G2 with 1 oz. final metallization weight. The relatively thick substrate was chosen to allow wide track widths of the required characteristic impedances to handle the high RF power levels and the DC current under large signal drive. The quiescent bias for the transistor is +50V with a drain-source current of 260mA.

A plot of the transistor’s measured Gmax (maximum available gain) is shown in Figure 2. Breakpoints occur at 1.4 GHz and 2.1 GHz, indicating a region of unconditional stability between these two frequencies. The operating band of the amplifier is in a region of conditional stability with a maximum stable gain of 26 dB. The final amplifier gain will obviously be lower than this, due to the need for an amplifier that is unconditionally stable, the real losses associated with adding the matching and bias networks, and the fact that the amplifier will be matched for power and efficiency rather than conjugately matched.

The amplifier needs to be unconditionally stable at all frequencies at operating temperatures down to -40°C. Although the stand-alone transistor is unconditionally stable at around 1.8 GHz, at frequencies above and below this it is potentially unstable, so steps must be taken to ensure stability in these regions. At low frequencies there is a very significant amount of available gain, and it is essential that steps are taken to adequately suppress this.

Large-signal load-pull data for the mounted device demonstrated that at 1.1 GHz the device is capable of delivering around +51 dBm output power at 3 dB compression. The target load impedance at the output reference plane was found to be 5Ω + j2Ω and the target source impedance at the input reference plane was found to be 0.73Ω + j0.64Ω. The Smith chart in Figure 3 shows these impedances presented in an 11.7Ω characteristic impedance environment. It should be noted that the target input impedance is very close to the short-circuit point on the Smith chart; it is also close to the edge of the stability circles. A degree of compromise is therefore required in the design process to ensure unconditional stability while simultaneously presenting a source impedance that provides good power transfer characteristics.

The amplifier schematic is shown in Figure 4. All of the passive components (resistors and capacitors) are SMT components and are carefully selected to handle both the high DC voltages and high RF input powers that are required. The capacitors are 800A series (250V) from ATC. The series RF resistors (required for ensuring unconditional stability) are mainly power resistors from IMS. These resistors can dissipate 25W of CW power in a 0805 size package. The bias networks for both the drain and gate make use of printed transmission lines terminated with a shunt SMT capacitor to provide a short circuit at mid-band. The transmission line is designed to present an open-circuit at the device and incur minimal RF loss. Additional RC decoupling is included at the gate and drain bias points, to provide out-of-band attenuation at low frequencies and ensure unconditional stability.

Input and output matching networks are low-pass structures that transform the 50Ω system impedance to the lower source and load impedances required for optimum power transfer. The matching networks are implemented as mixed lumped/distributed structures with shunt SMT capacitors and printed series transmission lines. This is evident from the PCB layout plot shown in Figure 5. It is essential that the transmission lines are wide enough to handle the expected RF power levels, as if the tracks are too narrow they can simply vaporize under high RF drive.

An RF damping circuit was employed at the input of the amplifier, which was a further measure to ensure low frequency stability and gain reduction. The circuit consists of a high value resistor bypassed in-band by a series LC resonator. The position and topology of the circuit were carefully chosen to provide maximum low frequency rejection with minimum impact on in-band performance. An important feature of the topology is that it avoids presenting any undesirable impedance to the device that could lead to oscillation.

A photograph of the final assembled amplifier is shown in Figure 6. The 32 mil thick Rogers 4360G2 PCB is mounted onto an aluminum alloy carrier, which acts as a heat spreader and can be fixed to a heat-sink.

A side-plate is fixed onto the side of the carrier through which bias is applied. The blue wire is for the gate bias, the red wire for the drain bias and the black wire is 0V. The RF input and output have been designed to mate with low-cost SMA connectors. Note the hole in the front face of the metal carrier. This allows a thermocouple to be placed beneath the packaged device to accurately measure the temperature at the base of the transistor.

Measured Performance

All of the measured results presented here are for the complete amplifier as shown in Figure 6, including connector losses. Small signal S-parameter measurements were carried out at package base temperatures of -40°C, +25°C and +85°C. These measurements, shown in Figure 7, were carried out at CW.

The S-parameter data demonstrates that the final amplifier has a small signal gain of around 19 dB across the band which varies by less than 2 dB over a wide temperature range. The input return loss is hardly affected by temperature and is 5 dB worst case across the band. This relatively poor return loss is a function of matching to the desired source-pull impedance. The output return loss is nominally around 7 dB—this is also a result of designing for a power match rather than a conjugate match.

Large signal measurements were also carried out over temperature under pulsed conditions, with a duty cycle of 10% and a pulse width of 128µs.

During the large signal measurements, the input power was swept from around 10 dB back-off, up to and slightly beyond 3 dB gain compression. Over the power sweep, the dissipated power in the package increases so the package temperature increases. The results shown in Figure 8 were taken at mid-band (1.09 GHz), at temperatures of -40°C, +85°C and +25°C.

Gain variation with input power and temperature is shown in Figure 8(a), where it can be seen that 3 dB gain compression is occurring at an input power of +33 dBm at low temperature, +34 dBm at nominal temperature and +35 dBm at high temperature. The plot of Pout versus Pin in Figure 8(b) indicates that the mid-band output power at 3 dB compression is nominally +51 dBm, varying by just ±0.3 dB over temperature. Figure 8(c) shows that Power Added Efficiency (PAE) is over 70% at all temperatures when the device is at the 3 dB compression point.

Finally, the key performance metrics at 3dB compression are shown in Figure 9, taken at room temperature across the band of interest.

The PA achieves a minimum of 50dBm (100 W) output power, 54% PAE and 16.5 dB gain at P-3dB compression point at the band edges. At the center of the band, efficiencies in excess of 70% are achieved. It is particularly noteworthy that these performance figures include losses associated with the matching networks and connectors. Similar performance has been replicated across a number of units.

Conclusion

It has been demonstrated that excellent wideband performance at L-band can be realized from a GaN transistor housed in a NI360 metal-based ceramic package, such as the QPD1008 from Qorvo. A single-stage power amplifier based on this device was designed for optimum performance from 960 MHz to 1215 MHz. At mid-band under nominal conditions, the amplifier has 20 dB small signal gain, provides over +51 dBm output power at 3 dB compression (125W) with a corresponding PAE of 70%.