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A Brief Tutorial on Power Loss in WBG Semiconductor Devices


by Alan Wadsworth – Keysight Technologies, Inc.

(Due to the number of figures, all figures are at the end of the article.)

Although many microwave engineers are familiar with wide bandgap (WBG) semiconductors for their uses in RF applications, they may not be as familiar with their applications in power circuits.  WBG materials (most commonly either SiC or GaN) have a number of properties that make them superior to silicon for power applications, including higher thermal conductivity, higher electron saturation, and higher electric field breakdown.  These properties translate into higher operating voltages, higher operating temperatures, higher operating frequencies, and lower on-resistance (Ron). Because they operate at high frequencies and have low on-resistance, power loss in WBG devices is dominated by dynamic power loss rather than static power loss.

Semiconductor power loss consists of three components: conduction loss, driving loss, and switching loss.  Conduction loss is always present; it is the loss due to the innate on-resistance of a power MOSFET (or the Vce saturation voltage of a bipolar device).  While conduction loss itself does not have any frequency dependence, the average conduction power loss does depend on the duty cycle.  Driving loss is probably less familiar to those not acquainted with power transistors, but it arises from the need to add or remove charge from a transistor gate in order to turn it on or off.  In addition to gate charge, driving loss also depends on the applied gate voltage and the switching frequency.  Switching loss is caused by device capacitance, which slows device switching transitions and causes the upper and lower totem pole transistors to both be in their linear regions simultaneously.  Besides device capacitance, switching loss depends on the device gate resistance as well as (of course) the switching frequency.  Figure 1 summarizes these three factors.

In order to measure WBG transistor power loss, you need to characterize device on-resistance, capacitance, and gate charge.  In the following sections, we will review how each of these parameters is determined.

Power Device On-Resistance Measurement

Measuring the on-resistance of a power transistor is not fundamentally different from other types of current-voltage (IV) measurement, but the high currents and voltages used do require some special considerations.  The primary concern is to prevent the device under test (DUT) from self-heating, which distorts the measurement results and in extreme cases can lead to thermal runaway and device destruction. To prevent this, IV measurements need to be performed using relatively short pulses (on the order of tens of microseconds) with very long duty cycles (typically <1%) to give the device time to cool down between measurements. Additionally, it is important to have some means to view the pulsed current and voltage waveforms to verify that the pulse width is long enough to permit everything to stabilize before the measurement is made. An example of this is shown in Figure 2.

The actual measurement takes place inside of the green rectangle, and these waveforms do show that the waveforms have stabilized sufficiently for this to be a valid measurement.  If (for example) the drain current (Id) did not reach its peak value by the time the measurement occurs, then the pulse width would need to be increased to give it time to stabilize.

In addition to pulsed IV measurement capability, it is important for the measurement equipment to have a wide dynamic measurement range. Power transistors, especially WBG devices, have very small on-resistances (less than a milliohm).  However, they need to be characterized under actual operating conditions. This means that accurate sub-milliohm resistance measurements need to be made at hundreds of amps of current. Figure 3 illustrates the measurement of a power transistor on-resistance measurement at 300 A of current.

As this plot (Figure 3) shows, the measurement equipment needs to have the ability to supply hundreds of amps of current while still being able to measure small changes in voltage.  The measured on-resistance for this device is approximately 900 micro-ohms.

Power Device Capacitance Measurement

The main challenge when characterizing power device capacitance is that you need to measure the capacitances using a small AC signal (typically millivolts) while simultaneously applying thousands of volts of DC bias to the DUT.  Standalone capacitance meters can typically only supply up to around 20 V of DC bias, and thus they cannot be used to characterize capacitance in power devices.  The key to making these measurements is the high-voltage Bias-T.  The purpose of a Bias-T is to combine the small AC voltage signal from a capacitance meter or module with a large DC voltage (normally supplied by a source/measure unit or SMU). Keysight’s high-voltage Bias-T is designed to work with the multi-frequency capacitance measurement unit (MFCMU) and high-voltage SMU (HVSMU) modules of the B1505A and B1506A.  A simplified circuit schematic of the high-voltage Bias-T is shown in Figure 4.

Note that the AC guard of the MFCMU is available, and in certain measurement situations it is necessary to connect the AC guard to one of the DUT terminals.

For power MOSFETs, the drain is biased to a very high voltage, and both the drain-to-source capacitance (Cds) and the gate-to-source capacitance (Cgs) are dependent on the DC value of the drain voltage.  The AC model of a MOSFET is shown in Figure 5.

Power MOSFET data sheets specify MOSFET capacitance in terms of output capacitance (Coss), input capacitance (Ciss), and reverse transfer capacitance (Crss).  These parameters can be calculated from Cds, Cgs, and Cgd using the equations shown in Figure 6.

Figure 7 shows the correct way to measure Cgd (=Crss) using the HV Bias-T.

Since Coss is a simpler measurement to make we will discuss it first. To measure Coss we simply need to short the gate and source terminals using a wire as shown in the Figure 8.

The measurement of Ciss is more challenging because we need to connect the CMH terminal to the drain and also bias the drain to high-voltage. The solution is to create an AC connection to the CMH terminal of the MFCMU and a DC connection to the HVSMU. Figure 9 illustrates this technique.

A large capacitor is placed between the CMH and drain terminals to short out the drain-to-source capacitance (Cds) to AC signals. This DC blocking capacitor has to be much larger than the gate-to-drain capacitance (Cgd) so that the effective impedance between the CMH and CML terminals consists only of the parallel combination of Cgs and Cgd. The HVSMU must be connected to the drain node through a relatively large resistor to prevent it from interfering with the AC capacitance measurement.

As this discussion shows, measuring power devices can be a complicated process that requires a lot of connection changes.  The ideal solution is one which has switching circuitry that can automate this process (Figure 10).

Both the B1505A and B1506A support solutions as shown above, making it possible to measure power device capacitance at up to 3 kV, as shown in Figure 11.

Gate Charge Measurement

Gate charge is the charge that you have to place onto or remove from the gate (or base) of a transistor in order to turn it on or off, respectively. Gate charge is plotted as a curve with charge (Qg) on the x-axis and the gate-to-source voltage (Vgs) on the y-axis. A “typical” gate charge curve for a silicon MOSFET is shown in Figure 12.

In the initial portion of the curve, the input capacitance (Ciss) is being charged and the device is still off. When sufficient charge is on the gate to start turning the device on then Vgs stops increasing temporarily. This portion of the curve is known as the plateau voltage, and it has a value designated as Vgp. The Vgs voltage will remain at Vgp until the device is completely turned on.  Once the device is fully turned on, charge can still be placed on the transistor by continuing to charge up the input capacitance (Ciss). However, it should be noted that Ciss, which is the sum of the gate-to-drain and gate-to-source capacitances, is voltage dependent. This means that the slope of the curve for the regions before and after the plateau voltage region, while proportional to 1/Ciss in both cases, is not the same. Note: While silicon devices have a flat plateau region, WBG devices typically do not saturate fully at typical test voltages and exhibit an upward slope in the plateau region.

To measure gate charge, the transistor is switched on or off while driving a specified load, and during this time the current going into the gate is monitored.  Provided that you can measure gate current and time accurately, you can determine the charge going into (or out of) the gate.  The key challenges to making this measurement are as follows:

  1. Obtaining a VDD supply capable of supplying high voltage in the off state and high current in the on state
  2. Obtaining a gate drive supply stable enough to provide accurate time-dependent output voltage and current
  3. Designing a gate drive circuit that can accurately measure time-dependent current and voltage

The Two-Pass (HV/HC) Gate Charge Measurement Technique

The two-pass gate charge measurement technique eliminates the need to simultaneously provide both high voltage and high current by breaking the gate charge measurement down into two parts. The assumptions made for the two-pass gate charge method are as follows:

  1. The values of Cgs (off) and Ciss (off) are almost the same at high-current and high-voltage
  2. The value of Vds (on) is virtually the same for high-current and high-voltage operation

These assumptions are both reasonable for devices typically used in inverter/converter circuits.

The high-voltage and high-current curves are combined together as follows:

  1. The derived gate charge curve tracks the initial slope of the HV curve until it reaches the level of the plateau voltage measured by the HC curve
  2. The derived gate charge curve then follows the HC plateau voltage line until it intercepts the HV curve
  3. The derived gate charge curve then extends upward from this point using the slope of the HC curve

Figure 13 illustrates this procedure.  Both the HC and HV curves are measured using JEDEC standards (JESD24-2).

The Keysight B1505A and B1506A can both measure gate charge, but in general a special gate charge adapter is required for this measurement. This arises from the requirement that gate charge be measured while driving a specified load, which necessitates a special test fixture to accommodate the load and the device under test (DUT).

Measurement of a SiC Transistor

Keysight Technologies has two solutions for characterizing both silicon based and WBG power devices. The B1505A Power Device Analyzer/Curve Tracer can measure devices at up to 10 kV and 1500 A, and it can be used to characterize both packaged and on-wafer devices. The B1506A Power Device Analyzer for Circuit Design can measure devices at up to 3 kV and 1500 A, and it can generate a complete data sheet for a packaged device automatically. Table 1 summarizes the key differentiators between the two products.

In this example, the B1506A was used to characterize a SiC MOSFET with maximum ratings of Ids = 40 A and Vds = 800 V. The graph in Figure 14 shows that the on-resistance was measured to be less than 40 milliohms up through the device’s maximum current rating of 40 A.

Figure 15 shows all of the capacitance parameters measured up to 800 V.

These measurements were all made without having to change any connections for the different capacitance measurements.  Figure 16 shows the gate charge measured as Vgs changes from -5 V to 20 V.

This plot (Figure 16) shows the upward sloping plateau voltage region that is typical of SiC transistor gate charge measurements.

Using the above measurements, it is possible to use standardized equations to compute the various components of power loss versus switching frequency.

Note that while conduction loss dominates at low frequency, at higher switching frequencies, power loss is dominated by dynamic power loss (switching loss in this case). This is illustrated in Figure 17.


Calculating power loss in WBG semiconductors requires equipment beyond that of a conventional analog curve tracer (which can only measure current and voltage). Since WBG semiconductor devices are dominated by dynamic power loss at higher switching frequencies, equipment capable of measuring transistor capacitance and gate charge under actual operating conditions is required. Keysight Technologies has two solutions that can meet these needs (the B1505A and B1506A), and by using these instruments it is possible to measure the parameters necessary to fully characterize power loss in WBG semiconductor devices.

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