3U OpenVPX FPGA Processor
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These FPGA boards use all the ADC and DAC channels of the Xilinx Gen 3 Zynq® UltraScale+™ RFSoC. Maximum sample rates are 5 GSps for the ADC and 10.0 GSps for the DAC with 14 bit resolution. Backplane RF is supported via VITA 67 and the 3XS0 board is hot- swappable in air-cooled environments. It was developed in alignment with the SOSA standard and other configurations are available – contact the factory for part number options.
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