by Cecile Masse, Wireless Systems Engineering Consultant, Otava
While RF amplifiers, VGAs, and digital step attenuators have evolved to support multi-gigahertz bandwidths in a single device, total signal chain cumulative passband selectivity is typically fixed and tailored to one band of operation. This means that a new bill of material is required for each band-specific design. With a tunable bandpass filter, multi-band radios can be fabricated from small-signal RF chains, and the filter’s center frequency, passband, and out-of-band rejection can be fine-tuned.
Using a single tunable device is particularly important when designing a radio for multiple 4G LTE or 5G NR applications, as there is a significant cost advantage by reusing the same device across multiple platforms. In addition, costs can be reduced further in development time and testing efforts.
To illustrate these benefits, this article focuses on a suitable application for a tunable filter, the output reconstruction filter for a broadband direct-RF digital-to-analog converter (DAC). The filter used in this example is the OTFL101, a member of Otava’s family of bandpass tunable filters that address filtering requirements between 2.5 GHz and 40 GHz. These filters have power handling capability up to 1 W RMS, linearity of +45 dBm, and can be used almost anywhere in RF signal chains.
The OTFL101, shown with its evaluation board (Figure 2), is a single-chip filter with a tuning range of 2.5 to 7 GHz, measures 2.3 x 1.6 mm, and requires no external components. It is controlled via a three-wire serial interface that takes 1.8 VDC CMOS signals (CLK, data, device select). The filter is a fifth-order design in which each of five capacitor banks or resonators may be configured individually, each with a 5-bit word. Figure 1 shows overlayed S21 responses at five center frequencies and illustrates how, with simple tuning applied, the fractional bandwidth remains roughly constant over the tuning range.
RF-Sampling Architectures Filtering Requirements
While there are many RF-sampling digital-to-analog converters (DACs) available, the analysis performed here is based on the multi-channel AMD Xilinx Zynq® UltraScale+™ Gen3 RFSoC that enables high-bandwidth RF-sampling or direct-RF conversion from DC to 6 GHz and a sampling rate up to 9.85 G/samples/s with on-chip digital upconverter. The upconverter is the digital modulator ahead of the DAC. Its high-resolution digital NCO enables precision modulation to RF, removing the need for an external analog mixer or modulator.
Mixing terms through the complex modulator are replicated through the DAC sampling process at the sampling rate of Fs, creating image tones at nFs +/-Fo along with the desired real signal at Fo. It is a common practice to apply a reconstruction filter directly after digital-to-analog conversion to eliminate these unwanted terms before amplification.
The most dominant image tones at the DAC output are at the Fs-Fo and 2Fs-Fo frequencies. Figure 4 shows their frequency relative to the wanted signal at Fo for a DAC sampling rate of 6.144 Gsamples/s. From this chart, the nearby tone frequencies can be extracted for a desired output signal with an Fo of 4 GHz:
- An image at 2.144 GHz (Fs-Fo image)
- Sampling clock leakage at 6.144 GHz (Fs leakage)
- An image at 8.288 GHz (2Fs-Fo image)
- An image at 10.144 GHz (Fs+Fo image)
As the DAC frequency response rolls off past 6 GHz, spurious and image tones beyond this frequency tend to be of lesser amplitude than Fs-Fo images that fall in-band and do not require as much filter selectivity. In addition, for a given DAC sampling rate, the frequency separation between the wanted signal and its images changes as a function of the targeted RF output frequency. This means that the DAC reconstruction filter must be replaced or adjusted to track the wanted RF signal and provide adequate selectivity where needed.
Table 1 provides a snapshot of how the OTFL101 tunable filter compares to existing off-the-shelf ceramic or LTCC filters.
Comparison with a Fixed-Frequency Filter
Figure 3 shows a typical signal chain implementing a direct-to-RF transmitter with the amplifier front-end excluded. Using this architecture, the article will illustrate the performance of the signal chain when a traditional fixed filter or the OTFL101 are used as the DAC reconstruction filter. The key metrics of interest are absolute output power level, SNR, and output noise floor density (Table 2). As the SNR performance of a transmit chain is dominated by the digital upconverter, modulator, and small-signal amplification chain, the power amplifier front-end can be ignored for this discussion.
The analysis also assumes operation at maximum gain setting (DSA at minimum attenuation) and considers two variants of the same wideband GaAs amplifier (the Qorvo QPA9126 and QPA9127) with either 15 or 20 dB of power gain. There is no impact on power dissipation between these two variants. Despite its higher insertion loss, the tunable filter results in only a 1.5 dB SNR degradation over a fixed filter implementation when used as a higher gain amplifier post-filter.
This is primarily the result of 1 dB less output power combined with 0.5 dB higher noise floor. The computed SNR is sufficient to drive a power amplifier front-end at nearly 68 dB for a 50 MHz modulated signal with a 9 dB peak-to-average ratio. It is also worth noting that the tunable filter has no impact on output linearity performance and behaves as linearly as a fixed filter does.
Signal Chain Performance
Transmitter signal chain performance has been evaluated using the Xilinx development kit that consists of the AMD Xilinx ZCU208 card and the XM655 balun board for the differential to single-ended conversion post-DAC. The output of the balun is connected to the OTFL101 evaluation board, which is then connected to a Rhode & Schwarz FSW spectrum analyzer. All results have not been de-embedded for the transmission lines and board interconnect losses.
In the example test case, the baseband CW signal is modulated to a DAC RF output frequency of 4 GHz. Figure 5 shows DAC output images and the desired signal at 4 GHz over a 12 GHz span without filtering post-DAC. The DAC sampling rate has been set to 6.144 GHz. The output spectrum with filtering through the OTFL101 set to a center frequency of about 3.9 GHz shows that there is more than 50 dB of rejection of the Fs-Fo image at -2.2 GHz and the 2Fs-Fo image at +3.88 GHz from the desired signal (Figure 6). Because of the analyzer’s wide span setting, the reduction in out-of-band noise floor is not visible.
Let’s now look at a higher DAC output frequency, and for that the filter is next tuned to 5 GHz, as shown in Figure 7, using the same procedure except that the DAC numerically-controlled oscillator (NCO) frequency is now shifted to place the desired CW signal at 5 GHz and the DAC sampling rate is set to 6.4Gsps. Figure 8 shows the clean output spectrum with filtering through the OTFL101.
The OTFL101 again proves very effective in rejecting unwanted images with more than 50 dB rejection of the Fs-Fo image at 1.39 GHz and 2Fs-Fo image at 7.78 GHz. Similar results can be obtained over a wide range of RF output frequencies, making this RF lineup entirely software programmable from 2.5 to 6 GHz.
Today’s RF-sampling architectures offer powerful capabilities, including excellent RF performance and an attractive bill of material for sub-6 GHz MIMO applications. The OTFL101 is very well suited for such wideband software-defined front-end signal chains when serving as a tunable reconstruction filter after digital-to-analog conversion in RF-sampling architectures. It provides more than 50 dB out-of-band rejection, which is sufficient to remove unwanted transmit spurious and image signals ahead of the distributed RF amplification chain. To aid with system-level optimizations, Otava is also offering a MATLAB-based behavioral model of the filter called the “OTFL101 Model Explorer App.” This model may be downloaded from the MathWorks File Exchange.