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Important Considerations when Designing with GaN Devices

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by Leonard Pelletier, Business Development Manager, RF Power, RFMW

Base-station RF power amplifiers have long used Laterally-diffused Metal-oxide Semiconductor (LDMOS) devices to meet cost-efficiency requirements. However, many designers are now turning to high-performance GaN-on-SiC power amplifiers to boost performance. Several challenges make GaN devices significantly different from LDMOS FET devices, particularly bias sequencing, gate-source voltage (Vgs) drift, temperature compensation, gate leakage current, and the thermal measurement process for MTTF calculations. When considering GaN devices, it’s important to have a general understanding of each one.

Bias Sequencing

The basic structure of a typical HEMT is shown in Figure 1. Most AlGaN/GaN High Electron Mobility Transistor (HEMT) RF field effect transistor devices are on, and full conduction is enabled when zero bias is applied, which means they are depletion mode (D-mode) devices. They require a negative gate-to-source bias voltage application to turn them off before the drain voltage is switched on. Negative gate-to-source bias voltage application limits the idle current for proper class AB operation. Turn-on sequencing can be controlled through external biasing circuitry, manufactured, or controlled with GaN biasing chips created explicitly for this purpose. For instance, the Qorvo ACT41000 is a programmable output, low-noise, DC-to-DC buck converter with auxiliary bias supply regulators.

Figure 1: Typical GaN HEMT structure Source: Semiconductor Today

Vgs Drift

Once a stable class AB operating point has been established in a GaN device, it is often observed that the drain current will change logarithmically over time, even with a fixed Vgs voltage setting. This phenomenon, known as Vgs current drift, occurs because a counter-biasing positive charge slowly fills the traps (defects) in the epitaxial region on the surface in a HEMT channel. This changes the intrinsic Vgs voltage internal to a device and alters the steady-state class AB drain current when zero RF energy is applied.

The gate voltage and initial bias setting can be re-adjusted to reset the drain current back to its initial setting. Still, it can continue to drift throughout the device’s lifespan—albeit at a very low rate after the initial drifting has occurred. A large RF signal allows the traps/defects to be filled faster. Under high RF signal drive conditions, the drain current increases to the proper level for maximum output power and efficiency.

Most devices can accept a relatively wide range of initial class AB bias settings and still perform consistently well. One mitigating option is to set the initial bias slightly higher than the optimum in an AlGaN device. After a short 24 to 48 hour burn-in, the initial setting drifts down to the desired range.

Temperature Compensation Requirements

A consistent, fixed Class AB bias setting is also dependent on the operating temperature of the AlGaN/GaN HEMT-on-SiC device. As the temperature of the device’s conduction channels changes, gate bias voltage must also change to compensate for this fluctuation. With typical GaN devices, the gate bias voltage needs to shift upwards by about +1 mV per degree Celsius for the device itself.

However, the device’s operating temperature also depends on the heatsink and the entire amplifier’s temperature. Most bias circuits have a heatsink temperature monitoring sensor that actively measures the heatsink temperature and adjusts the bias voltages applied to the device, which is generally about +2 mV/°C. An example of Idg versus temperature with a fixed Vgs bias setting is shown in Figure 2, and typical Vgs variations versus temperature for a fixed Idq bias shown in Figure 3.

Figure 2: Typical Idg vs. temperature with a fixed Vgs bias setting Source: Qorvo
Figure 3: Typical Vgs variations versus temperature for a fixed Idq bias setting Source: Qorvo

Gate Leakage Current

Although many AlGaN/GaN HEMT RF devices are FETs, there are still small amounts of gate leakage current because the gate terminal is a (leaky) Schottky diode. The bias circuit must be able to sink and source currents at the gate to maintain consistent bias levels across varying RF drive levels. Gate leakage current flows both ways. At low RF drive levels, the current flow is out of the device and into the bias circuitry.

At high RF drive levels, the gate current will flow into the device due to the gate diode’s rectification of the RF drive. The amount of gate leakage current is related to the device’s size and power. Larger transistors will have higher gate leakage currents when compared to smaller devices. Bias circuitry must be able to account for gate leakage ranges and control them accordingly.

Thermal Measurement Process for MTTF Calculations

A typical GaN device thermal stack-up is illustrated in Figure 4. AlGaN and GaN-on-SiC HEMT reliability is a function of the channel temperature between the gate and drain of an active channel. A device “failure” occurs when the conductivity of this channel drops by 10% due to a gate sinking failure mechanism of interdiffusion of metal atoms from the gate into the channel.

Figure 4: A typical GaN device thermal stack-up

The channel structure is small and contains metallization within the active channel, which makes it impossible to measure the device’s operating temperature directly using an infrared (IR) microscope. Instead, the operating temperature can be simulated using finite element analysis with a 3D model of the channel structure.

Validation of a 3D ANSYS model requires DC test structure creation and measurement with specialized IR microscopes that must consider their large spot-size limitations and match the 3D model size to that of the camera. The model is considered accurate if the measured-versus-model numbers match within 5%. Figure 5 provides an equation used to calculate the thermal resistance of a device.

Figure 5: An example of energy flows in and out of an RF device used to calculate thermal resistance

The thermal resistance of a device also varies as a function of pulse width and duty cycle. Most device data sheets will show a thermal resistance curve similar to Figure 6. Thermal resistance decreases with both pulse width and duty cycle. Conversely, it increases with increasing pulse width and duty cycle until a curve converges on a single number, which is the CW thermal resistance rating of the device. Figure 7 shows extrapolated predicted MTTF based on measured data in a relatively short period for a fixed Idq bias setting.

Figure 6: Thermal resistance versus pulse duty cycle
Figure 7: The extrapolated predicted MTTF based on measured data over a relatively short time

Mean Time to Failure (MTTF) Calculations

The MTTF in AlGaN devices is the 10% increase in channel resistance due to the sinking of the gate and is measured and extrapolated using test structures. These test structures are measured at extremely high temperatures for extended periods to collect real-world data about a manufacturer’s various GaN structures. The data boxes on the upper left of Figure 7 are actual data points out to about 5,000 hr. The 225°C failure rate is then extrapolated out to the 10 million hr., a 1000-year range. Prediction of the MTTF of a GaN device is not a simple task as it involves many different measurement and simulation tools. The predicted MTTF should be within +/- 5% of the actual life cycle of the device in a well-executed simulation.

Conclusion

GaN HEMT devices have distinctive design challenges when compared with the LDMOS devices used in traditional base station design, and each technology has its pros and cons. Accounting for the five GaN design considerations and challenges can be a struggle, but the performance trade-off is often worth the time. GaN offers desirable alternatives for a designer looking for higher efficiency, higher power density or higher frequencies of operation.

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