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PLL/VCO with System Reference Retimer

PLL/VCO with System Reference Retimer
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The ADF4378 low jitter, integer-N phased locked loop (PLL) has an integrated VCO and system reference retimer and is suited for data converter and mixed-signal front-end clock applications. The PLL has a -239 dBc/Hz normalized in-band phase noise floor, very low 1/f noise, and a phase/frequency detector (PFD) frequency that can achieve ultra-low in-band noise and integrated jitter.

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